Recursive use of make

[livoriolcc]

Hi, im trying to write a makefile to manage a C++ object oriented project. I 
have a top level makefile that defines and exports a variable. When i call a 
sub-makefile this variable gets new text appended to it. I need to use the new 
text in the top-level makefile, but when make finishes the processing of the 
sub-makefile the text that was appended dissapear. How can I use in a top-level 
makefile the values that a sub-makefile appends to a exported variable?

Thanks in advanced. Sorry, my english is terrible.

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