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Re: computed variable names in prerequisite "$$*"

From: Ted Stern
Subject: Re: computed variable names in prerequisite "$$*"
Date: Thu, 12 Jan 2006 14:03:10 -0800
User-agent: Gnus/5.110004 (No Gnus v0.4) Emacs/22.0.50 (gnu/linux)

On 12 Jan 2006 at 12:47 UTC-0800, Martin d'Anjou wrote:

> Hi,
> I do not understand why make says "No rule to make target" with this
> makefile when the target is t_two:
> $(shell mkdir -p src)
> $(shell touch src/file1.c)
> $(shell touch src/file2.c)
> var_one=file1
> var_two=file1 file2
> t_%: $(patsubst %,src/%.o,$$(var_$$*))

Your problem is here.  As I understand it, you can't use functions as
pattern rule prerequisites.  I could be wrong, though ... is that a
new feature in 3.81?

>       echo Done t
> %.o: %.c
>       cp $*.c $*.o

I think one way to work around this is to have *no* prerequisites,
then add them explicitly:

t_one:   <some substitution I don't understand>

If you want to do this for lots of targets, you can use $(foreach) and

 dodecatheon at gmail dot com
 Frango ut patefaciam -- I break so that I may reveal

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