Re: how does Make process command sections before passing to the shell

[Paul D. Smith]

%% "Andrew Ferguson" <address@hidden> writes:

  af> I have a question that I was hoping someone could answer. I am
  af> trying to understand which characters have special significance in
  af> a rule command section and which participants are involved in
  af> processing them.

  af>     target: dep1.ext dep2.ext dep3.ext
  af>           command --opt1 val1 etc..

  af> how can you predicate which characters will be given special
  af> significance? It seems the section of text after the rule header
  af> is processed by make itself before being passed to the underlying
  af> shell?

A command script is evaluated for make variables.  So, "$" is special
and needs to be quoted (as "$$") if you want to pass a literal "$" to
the shell.

Then the command is passed to the shell, as if you had typed this:

    $(SHELL) -c '...command...'

where SHELL is, unless reset in the makefile, "/bin/sh".

  af> At the moment, I'm aware that the following may do some textual
  af> processing before passing the commands on to the next layer
  af>     (1) Make
  af>     (2) A shell (or can tools sometimes be invoked direct by OS
  af>         process creation api?)

Make will sometimes invoke a command directly, for performance reasons,
but ONLY if it determines that the command is "simple enough" to be done
with a straightforward fork/exec, and not require any shell
capabilities.

  af>     (3) The tool itself

I guess I'm not sure what you're driving at.  Make will evaluate for
make variables.  Everything else should work exactly as if you'd typed
the command at the shell prompt.

-- 
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