Re: Request for help in setting a variable in GNU Make.

[Greg Chicares]

On 2006-4-6 7:40 UTC, Alexey Neyman wrote:
> Hey, he had already said what he needs:
> 
> <<<<<
> The main thrust of my endeavor here is to gather a list of all .cpp
> files that need to be compiled, and pass them to the compiler in one
> shot rather than invoking the compiler separately for each .cpp file.
> <<<<<
> 
> So, isn't the simplest way sufficient?
> 
> SRC = a.c b.c c.c
> PROG = prog
> 
> all: $(PROG)
> 
> $(PROG): $(SRC)
>     gcc -c $?
>     gcc -o $@ $(^:.c=.o)

I think that does more work than is needed.

  $touch a.c b.c c.c
  $touch a.o b.o
  $rm --force prog
  $make

That would execute

  gcc -c a.c b.c c.c
  gcc -o prog a.o b.o c.o

but a.o and b.o don't need to be recompiled.