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Re: .PHONY, FORCE, target execution

From: John Graham-Cumming
Subject: Re: .PHONY, FORCE, target execution
Date: Tue, 02 May 2006 14:47:50 +0200
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Leeuwesteijn,Joost wrote:
Because I like fancy output, and who knows what else it can be used for, I
hereby propose/request a new built-in target called .SUPERPHONY, .PHONY++ or
.FRAUD :-)
If a target is defined as .FRAUD, it will be executed -everytime- it is
listed as a prerequisite, it will be -ignored- in any $<, $?, $^ automatic
variables and will -not- cause a target to go out of date (which .PHONY
seems to do, just once).

Pseudo example:
app : module1.a module2.a
    @touch app

.FRAUD : banner
banner :
    echo "Do stuff everytime (module=$(MODULE))"

module1.a : MODULE := module1
module1.a : banner mod1file1.o mod1file2.o
    # $^ = mod1file1.o mod1file2.o ; $< = mod1file1.o

module2.a : MODULE := module2
module2.a : mod2file1.c banner mod2file2.c
    # $^ = mod2file1.o mod2file2.o ; $< = mod2file1.o

Output (after a previous full build):
Do stuff everytime (module=module1)
Do stuff everytime (module=module2)
make: `app' is up to date.

Ugh. That doesn't seem like a good idea; you are inventing something quite complex for a simple problem. There are a lot of implications to your suggest (e.g. each time Make 'executes' a FRAUD target should it retraverse all the prerequisites of the FRAUD?).

What you want is to reuse a bit of code in your Makefile. I think that's what macros are for. Why don't you write the following:

    .PHONY : all
    all : module1 module2

    .PHONY : module1
    module1 : MODULENAME:=module1
    module1 :
        @echo "Build module1 here..."

    .PHONY : module2
    module2 : MODULENAME:=module2
    module2 :
        @echo "Build module2 here..."

    banner = @echo "BANNER --- $(MODULENAME) --- BANNER"

It seems to me that there's little difference in writing $(banner) in the commands instead of banner in the prerequisite list.

If you need the banner to be printed before anything in the moduleX tree is run then you can just use a pattern rule:

    .PHONY : all
    all : module1 module2

    .PHONY : module1 do_module1
    module1 : MODULENAME:=module1
    module1 : address@hidden do_module1
        @echo "Build module1 here..."

    .PHONY : module2 do_module2
    module2 : MODULENAME:=module2
    module2 : address@hidden do_module2
        @echo "Build module2 here..."

        @echo "BANNER --- $(MODULENAME) --- BANNER"

Of course that relies on assuming that Make does left-to-right traversal of the tree and fails horribly if you do parallelism.

John Graham-Cumming


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