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Re: make can not find .cpp file, any general comments or suggestions to

From: Greg Chicares
Subject: Re: make can not find .cpp file, any general comments or suggestions to debug?
Date: Thu, 04 May 2006 14:04:11 +0000
User-agent: Mozilla Thunderbird 1.0.2 (Windows/20050317)

On 2006-5-4 7:01 UTC, Lin George wrote:
>>CPPCLAGS is used by th preprocessor, the C compiler,
>>and the C++
>>compiler (and other things that use the preprocessor
> In my previous mind, CPPFLAGS is only used for
> preprocessor, you mean it is also used for C and C++
> compiler?

Imagine that there are three distinct programs, one
for each phase:
  < source.c $(CPP)     > source.i # (1) uses $(CPPFLAGS)
  < source.i C_compiler > source.o # (2) uses $(CFLAGS)
  < source.o $(LD)      > binary   # (3) uses $(LDFLAGS)
where '<' and '>' are the usual *nix operators. The
phases are (1) preprocess, (2) compile, and (3) link.
Each phase has its own flags. That's clear, but
inconvenient to use.

I wrote 'C_compiler' above to indicate a program that
only compiles preprocessed source. It would use only
$(CFLAGS), and not $(CPPFLAGS). However, because it's
inconvenient to force you always to run a separate
preprocessor first, there's a convention that one
program does both of the first two phases. That one
program is what we refer to as $(CC).

Now which flags does $(CC) need? It needs $(CPPFLAGS)
and $(CFLAGS) both. To compile a '.c' file to an '.o'
file (with implicit preprocessing), with the options
usual for gcc, that would look like this:
  CC = gcc
  $(CC) $(CPPFLAGS) $(CFLAGS) -c source.c -o source.o
That's phases (1) and (2). I don't think there's any
way to run phase (2) alone because normally you would
never need to do that.

If you only want to preprocess a file, you could use
  CPP = gcc
  $(CPP) $(CPPFLAGS) -E source.o -o source.i
That's phase (1) alone.

To link a C program with gcc, you could use
  LD = gcc
  $(LD) $(LDFLAGS) source.o -o binary_name
That's phase (3) alone.

And you can even do all three phases in one step:
  gcc source.o
but normally you wouldn't do that in a makefile.

Thus, the same program, 'gcc', can perform all three
phases, or just the first, or just the last. But keep
the three phases distinct in your mind, and make the
flags follow the conceptual model.
  $(CPP) $(CPPFLAGS)           # phase 1 alone
  $(CC)  $(CPPFLAGS) $(CFLAGS) # phases 1 and 2
  $(LD)  $(LDFLAGS)            # phase 3 alone
In your makefiles, $(CC) and $(LD) will probably be
distinct steps, but normally you won't invoke $(CPP)
separately unless you need it for a special purpose
like generating dependencies.

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