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Fun with auto generated dependencies & clean...


From: Rick Flower
Subject: Fun with auto generated dependencies & clean...
Date: Thu, 19 Apr 2007 14:00:16 -0700
User-agent: Thunderbird 2.0.0.0 (Windows/20070326)

Hi all again.. This is not so much a problem as an annoyance to me that others are happily able to live with -- I'd like to solve it if possible.. What I've got is a source tree with C++ files (.cc) in it and as part of the Makefiles I've got, there are also auto-dependencies created when "make all" is invoked. This works great except for one case which we frequently do around here -- "make clean all". In that case, the dependencies are created only to be removed by the "clean".. If you separate the clean/all steps into separate steps it works great. Anyway, below are some Makefile snippets that may or may not shed some light on the issue.. If you've got any ideas on solving this annoyance, I'd love to hear about it. Thanks!

################################################################################
# Include the Makedepend Code
################################################################################
include Makedepend.mak

%.d: %.cc
        @echo "Building depends..."
        $(target_gpp) -MM $(GPPFLAGS) $< \
        | sed "/.*\.o:/ s%^[ ]*%\$$(OBJDIR)/%" > $@

ifneq ($(MAKECMDGOALS),clean)
-include $(SOURCES:.cc=.d)
endif

#
#######################################################################
# Define the rule to convert from a .cc file to a .o object file...
#######################################################################
$(OBJDIR)/%.o : %.cc %.d
        @echo "Prerequisites are: $^"
        $(target_gpp) $(GPPFLAGS) -c $< -o $@

all     : $(OBJECTS)

clean   :
        rm -f *.o *.a *.d $(OBJDIR)/*.o core
        rm -f *~ tags TAGS




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