Re: dependency problem

[Philip Guenther]

On 6/27/07, Paul Smith <address@hidden> wrote:
> On Tue, 2007-06-26 at 11:08 +0530, Bhaskar G wrote:
...
> > not  "cc src/bg.o src/bg1.o src/bg2.o -o bg.a
> > cc: src/bg2.o: No such file or directory
> > make: *** [bg.a] Error 1"
>
> > $(OBJS):makefile
>
> Maybe you have a stray TAB in your makefile after this line?

No, his situation can be reproduced given when he shows and without a tab there.

Paul, I seem to recall that on you website's pages describing
"advanced automatic dependency generation", the text described that
one of the problem with an early version was that if you removed a
header file, make would refuse to rebuild the dependent objects.  The
solution was to tweak the autogenerate bits to add rules without
commands that simply mentioned each header file, i.e., mapping this:

foo.o: foo.c foo.h bar.h

to:

foo.o: foo.c foo.h bar.h
foo.c foo.h bar.h:

Simply mentioning the files as targets keeps make from complaining or
doing anything when those files don't exist**.  What's more, the prose
on your webpage that described this solution actually cited text from
some official make documentation that described this behavior.  With
your website currently inaccessible by others, can you confirm whether
my memory is correct and, if so, cite it here?

My point is that I believe the behavior that Bhaskar is experiencing
is actually useful and documented somewhere authoritative.  The
prerequisite autogeneration example shows that it's useful (and in
use); your webpages may show where it's documented.


Anyway, the simplest workaround I can think of for the problem is to
assume that the object file names don't contain any file globbing
characters ('*', '?', or '[') and change the problem rule from:

   $(OBJS): makefile
to
   $(wildcard $(OBJS)): makefile

thus only adding the makefile dependency to the objects that already
exist.  In this case, there's effectively no change in semantics.

(Well, unless you're doing something insane where you compile a
program that is used to generate makefile bits needed for the
compilation of the real targets and that program can't be built until
the base makefile has been updated.  In that case, there's a change in
semantics, but that's a weird setup.)


Philip Guenther

** Hmm, it almost sounds like a result that's the opposite of
order-only prereqs.