Re: Rule-specific variables

[Paul Smith]

On Mon, 2008-03-10 at 17:56 +0000, Brendan Heading wrote:
> $.o : $.c
>     VAR=foo
>     $(compile)C 

I guess you meant  %.o %.c above, etc.

> I didn't think this work, and I was right. If I recall correctly, GNU
> make invokes a new shell process for each line, so setting variables
> won't work.

That problem is easily enough solved:

        %.o : %.c
                VAR=foo $(compile_c)

But, it means you have to use _SHELL_ syntax when you write your
variables (IOW, instead of $(VAR) you'd have to write $$VAR) because
this sets a shell variable, not a make variable.

> Target/Rule-specific variables won't work either, as I've got a mix of
> C and C++ files so the variable only gets set once (when the Makefile
> is parsed).

>From this comment I'm not sure you understand how target specific
variables really work.

However, perhaps a simpler way to go is constructed variables.  For
example:

        c_CFLAGS = -DC_COMPILER
        cc_CFLAGS = -DCC_COMPILER

        compile_cx = ... $($(subst $*.,,$<)_CFLAGS)

        %.o : %.c
                ...$(compile_cx)...

        %.o : %.cc
                ...$(compile_cx)...

This constructs the variable name based on the suffix of the first
prerequisite ($<).  Note I didn't test it so there might be some details
wrong but the overall concept will work.

-- 
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 Paul D. Smith <address@hidden>                 http://make.mad-scientist.us
 "Please remain calm--I may be mad, but I am a professional."--Mad Scientist