makefile parsing and variable expansion

[Ian Lynagh]

Hi all,

I am trying to understand how makefiles are parsed, e.g. why this
makefile:

# -----------
default:
        echo hello

define foo
q:
        echo this is q1
        echo this is q2
endef

$(foo)
# -----------

ends up containing this (according to "make -pr"):

# -----------
q: echo this is q1
 echo this is q2
# -----------

Is there anything other than the source that I can read to understand
this?


I am also confused as to why the above Makefile is accepted, while:

# -----------
default:
        echo hello

q: echo this is q1
 echo this is q2
# -----------

is rejected.


Thanks
Ian