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Side effects of pruning when doing 'clean all'.
From: |
Michele Zamparelli |
Subject: |
Side effects of pruning when doing 'clean all'. |
Date: |
Thu, 29 Jul 2010 11:43:52 +0200 |
User-agent: |
Mozilla/5.0 (Windows; U; Windows NT 5.1; en-GB; rv:1.9.2.7) Gecko/20100713 Thunderbird/3.1.1 |
Hallo,
I have a makefile which works flawlessly when doing 'clean' and 'all',
but which fails miserably when doing
'clean all'.
The reasons is pruning.
A clean subgoal deletes a generated C file (stack.c), which had been
generated earlier on, at dependency inclusion time.
When executing the all target, make eventually tries to build an object
file for a library, assuming that the generated C file is still there.
The C compiler is then called upon a non existing source file, and fails:
make clean all
gcc -c -o stack.o stack.c
gcc: stack.c: No such file or directory
gcc: no input files
make: *** [stack.o] Error 1
This is happening because when evaluating the prerequisites of the
object file, make decides to prune the C source file.
Here are a simplified makefile, exhibiting the same behavior, and the
output of a 'make -dr clean all'.
#
# Makefile model to exhibit make clean all failure
#
CCDEP = gcc -MM -MG -ansi
%.d: %.c
@echo "== Dependencies C: $@"
@$(CCDEP) $(CFLAGS) $(I_PATH) $< | \
sed -e "s/$*\.o/$*.o $*.d /" \
-e "s/:/: Makefile /" > $@ ; \
if [ ! -s $@ ]; then $(RM) $@ ; fi
%.o: %.c
gcc -c -o $@ $<
# this is normally done by macro expansion for libraries, executables
# CORBA stubs generation etc. etc.
include stack.d
stack.c: stack.xml
@echo "Simulating code generation"
@cp stack.xml stack.c
stack: stack.o
gcc $(LD_FLAGS) -L/usr/lib $< -o $@
.PHONY: all
all: stack
.PHONY: clean
clean:
address@hidden stack.o stack stack.c stack.d
I must be overlooking something, possibly a better way to include the
dependencies.
I also think that this problem (or a related one) has possibly already
posted on this list, but I could not find it
Does anyone know a solution to this?
You will probably have spotted another flaw in this: the dependencies
(gcc --MM) are automatically generated and included even when only 'make
clean' is called, on a directory which is clean already.
Ideally I would like the 'include' directives to be called only as part
of the 'all' target, but I understand this is conceptually not possible.
Or is it?
We are using GNU make 3.81.
thanks in advance,
Michele
debug.txt
Description: Text document
- Side effects of pruning when doing 'clean all'.,
Michele Zamparelli <=