local variable in make

[Peng Yu]

Hi,

I try to use some variable with in a macro. But it seems that multiple
calls to the macro use the same variable
#########
.PHONY: all

define myfun
PREFIX:=$1

all$1:
        echo all:$$(PREFIX)

endef

all: allabc
$(eval $(call myfun,abc))

all: allefg
$(eval $(call myfun,efg))
##################
$ make
echo all:efg
all:efg
echo all:efg
all:efg


I tried 'undefine' below. It still has the same problem. I guess this
is because make has two stage to pass the variables and then construct
the rules.

.PHONY: all

PREFIX:=abc

all: all1
        echo all:$(PREFIX)

undefine PREFIX

PREFIX:=efg

all1:
        echo all1:$(PREFIX)

Is there a walkaround to allow local variables in macro? (Not that I
couild append the variable with some unique suffix, but this looks
ugly and I tend to avoid this walkaround. I'm wondering if there is
any better walkaround)

-- 
Regards,
Peng