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Re: execution of rules in included Makefiles


From: Chris Cross
Subject: Re: execution of rules in included Makefiles
Date: Tue, 9 Nov 2010 17:43:13 -0500


> Paul Smith <address@hidden>
> On Tue, 2010-11-09 at 16:00 -0500, Chris Cross wrote:
> > I have a makefiles of the form:
> >
> > #Makefile
> >
> > .PHONY: all
> > all: foo
> >
> > foo: foo.o
> >         $(CC) $< $(LIBS) -o $@
> >
> > include Makefile.rules
> > include Makefile.gen
> >
> > # end Makefile
> >
> > Makefile.rules contains some pattern rules. Makefile.gen contains a
> > rule and that recipe is being executed before before the recipe for
> > foo in the outer Makefile. I'm probably not reading close enough, but
> > the manual doesn't seem to address execution of rules in included
> > Makefiles. Do rules in included Makefiles get executed in the read
> > pass of the outer Makefile?
>
> Not sure what you mean: make is not a procedural language.  Make always
> reads all the makefiles, which includes all "include"d makefiles, into
> an internal dependency graph.  No targets are built during the read
> pass.
>
> Only after everything is read in and processed does make start walking
> the graph to determine what to build.
>
> Now, you don't give enough information about what you're seeing to say
> for sure, but one thing to note is that make will try to rebuild any
> included makefiles.  So if your makefiles have rules that might apply to
> the included makefiles ("Makefile", "Makefile.rules", or "Makefile.gen")
> then those might be run before the first target is built.
>

Right, I'm dealing with a ginormous set of Makefiles someone else wrote
(isn't that always the case?) which I'm rewriting to use your scheme for
multi-arch builds. I expect by the time I whittle down to an appropriate
recreation of what's going on that I'll see the problem. My problem is that
rules in Makefile.gen are executing before `all' in Makefile. Here's some
sanitized output with --debug=v (I inserted a phony `debug' target as the
first prerequisite of `all'.)

Reading makefiles...
Reading makefile `/home/chris/dp-ws/multi-arch/bar/Makefile.gen' (search
path) (no ~ expansion)...

make[1]: Entering directory `/home/chris/dp-ws/multi-arch/_build/i686/foo'
[ -d /home/chris/dp-ws/multi-arch/_build/i686/bar ] || mkdir
-p /home/chris/dp-ws/multi-arch/_build/bar
Testing /home/chris/dp-ws/multi-arch/_build/i686/datapower/bar/hello.h ...
updated
<snip>
Updating goal targets....
Considering target file `all'.
 File `all' does not exist.
  Considering target file `debug'.
   File `debug' does not exist.
   Finished prerequisites of target file `debug'.
  Must remake target `debug'.
debug
  Successfully remade target file `debug'.

The "Testing" line above is from a rule in Makefile.gen that generates
source used in the outer makefile and before that is the rule I added to
make the target directory. What I see from using --debug=v is that rule
being executed before "Considering target file `all'", where `all' is the
first rule in the outer Makefile.


Thanks,
Chris


Chris Cross
DataPower Development
address@hidden
office 561-862-3026

Paul Smith <address@hidden> wrote on 11/09/2010 04:22:34 PM:


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