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Re: hidden dependencies

From: Krzysztof Cieniuch
Subject: Re: hidden dependencies
Date: Mon, 31 Jan 2011 16:53:23 +0000
User-agent: Thunderbird (X11/20101213)

Oleksandr Gavenko wrote:
On 21.01.2011 13:53, Krzysztof Cieniuch wrote:

But there
is caching and debugging mechanism that allows
to print generated rules instead of invoking them i.e. you may direct
build system so instead rule evaluating it prints them using $(info ).
How this done? Please explain more. '-n' option?

No  this is different from -n switch since debug output is fully
valid makefile with all the generated recipes. -n will give you only commands to execute.

Here is api it supports up to 6 parameters (first parameter in name of rule itself) but is straightforward to add more:

evalRule = $(info $(_hash) Rule: $(1))                         \
           $(info $(call $(1),$(2),$(3),$(4),$(5),$(6),$(7))) \
           $(eval $(call $(1),$(2),$(3),$(4),$(5),$(6),$(7)))

evalRule = $(warning Rule: $(1))                                        \
           $(if $(filter automatic,$(origin 2)),$(warning Arg1: $(2))) \
           $(if $(filter automatic,$(origin 3)),$(warning Arg2: $(3))) \
           $(if $(filter automatic,$(origin 4)),$(warning Arg3: $(4))) \
           $(if $(filter automatic,$(origin 5)),$(warning Arg4: $(5))) \
           $(if $(filter automatic,$(origin 6)),$(warning Arg5: $(6))) \
           $(if $(filter automatic,$(origin 7)),$(warning Arg6: $(7))) \
           $(info ----------------------------------------)            \
           $(info $(call $(1),$(2),$(3),$(4),$(5),$(6),$(7)))          \
           $(info ----------------------------------------)            \
           $(eval $(call $(1),$(2),$(3),$(4),$(5),$(6),$(7)))
evalRule = $(eval $(call $(1),$(2),$(3),$(4),$(5),$(6),$(7)))

Build system can operate in three modes:
if __BUILD_MK_CACHE variable defined it works in cashing mode
if __TRACE_RULES defined it works in debug mode which is similar to above but does some pretty formating
else works in normal mode i.e. just evaluates rules.

Here is sample of some very simple rule :
#arg1: target
#arg2: prerequisites
$(1): $(2)

So in makefiles instead of writing rule explicitly one use:
$(call evalRule,_RULE_DEPEND,target1,prerequisite1 prerequisite2)

also one needs to be careful in some parts when to evaluate things
e.g. when to include auto generated dependency files and when to just add include statement

$(info -include $(_cdeps_files))
-include $(_cdeps_files)

of course it means that all rules must go through this evaluation mechanism but it is not a problem since is well hidden from end users (i.e. developers) in core build system makefiles :-))).


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