how to remember updated targets across recursive make invocations?

[Mark Galeck (CW)]

Hello, 

consider this Makefile:

.PHONY: phony

all: dir/foobar dir/foobar1

dir/%: phony
        $(MAKE) -C $(@D) $(@F)


and then in the directory dir, the Makefile:

.PHONY: phony

foobar foobar1: prereq
        touch $@

prereq: phony
        touch $@

---------------------------------------------

>make all

causes the target "prereq" to be updated twice: make invoked recursively the 
second time does not remember that the first invocation already updated that 
target. If I do the same all in one directory and without recursive calls, the 
target "prereq" is only updated once, as expected.

Is there a way to have it update only once in the above example situation?

Thank you,

Mark