Re: how to do libraries of Make code?

[Oleksandr Gavenko]

On 2012-11-12, Britton Kerin wrote:

> First, are there any libraries out there that attempt to factor out the
> common code to build object files, link into programs/static/shared libs, 
> etc.?
> Essentially I'm thinking of a replacement for the old built-in rules implicit
> rules but with everything visible in a fragment that you include.
>
I write Makefiles for so strange embedded C compilers that template:

  $(CC) $(CFLAGS) -c $< -o $@

doesn't match CC calling syntax. So there're no any attempt to do "common code
to build object files".

> * Use recursive vars for settings, so users can override things
>
I don't like this convention. I dictate to define all variables/customisation
before including shared Makefiles in our team!

> * static pattern rules yield better error messages in my experience
>   and should be preferred over implicit rules.  The file sets to which
>   they apply can be explicitly computed by functions
>
Every my Makefile have:

  SHELL = /bin/sh
  export PATH := /bin:/usr/bin:${PATH}

  # Disable built in pattern rules.
  MAKEFLAGS += -r
  # Disable built in variables.
  MAKEFLAGS += -R
  # Disable built in suffix rules.
  .SUFFIXES:
  # Default target.
  .DEFAULT_GOAL = help

> * var default settings should go in fragments that get included *before*
>   client code, so users can replace or extend default values
>
In libraries I use code:

  ifeq '' '$(VAR)'
    VAR := xxx
  endif

which allow define default values in libraries but allow override it in user
code if define variable upper include statement.

-- 
Best regards!