[Ltib] Re: Having trouble to run 'spidev_test' on Phytec 3250 board.

[Quentin YANG]

Hi, 

One update about this topic. 
I did following change on amba-pl022.c. 

pl022_probe(struct amba_device *adev, struct amba_id *id)
{
       ...................................

    /* Allocate master with space for data */
    master = spi_alloc_master(dev, sizeof(struct pl022));
    if (master == NULL) {
        dev_err(&adev->dev, "probe - cannot alloc SPI master\n");
        status = -ENOMEM;
        goto err_no_master;
    }

        /* Quentin Added 2010-AUG-19 */
        master->mode_bits=MODEBITS;
    .........................

}

I can successfully set 'SPI mode' to mode 3. 

address@hidden debug]# ./spidev_test
spi mode: 3
bits per word: 8
max speed: 500000 Hz (500 KHz)
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00 

However, 'SPI CLK' stay 'ACTIVE low' despite I've change the SPI mode to 3.  : - (

More hacking to do......


Regards,
Quentin

On Thu, Aug 19, 2010 at 5:41 PM, Quentin YANG <address@hidden> wrote:

pl022_probe(struct amba_device *adev, struct amba_id *id)
{
.....
        /* Quentin Added 2010-AUG-19 */
        master->mode_bits=MODEBITS;

       

On Thu, Aug 19, 2010 at 11:30 AM, Quentin YANG <address@hidden> wrote:

Hi Kevin,

I can successfully run 'spidev_test' from user space as shown below.

address@hidden debug]# ./spidev_test
spi mode: 0
bits per word: 8
max speed: 500000 Hz (500 KHz)
00 00 00 00 00 00
00 00 00 00 00 00
00 00 00 00 00 00
00 00 00 00 00 00
00 00 00 00 00 00
00 00 00 00 00 00
00 00

But when I passed on command line option '-O' , I received error message.

address@hidden debug]# ./spidev_test -O
can't set spi mode: Invalid argument
Aborted

'dmesg' shows:
......
spidev spi1.0: setup: unsupported mode bits 2
......

According to source code: driver/spi/spi.c
............................
    bad_bits = spi->mode & ~spi->master->mode_bits;
    if (bad_bits) {
        dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n",
            bad_bits);
        return -EINVAL;
    }
..............................

It seems has something to do with '~spi->master->mode_bits'.

Any comments on this error?
What could be the reason?


Question Two:
Have you ever tried to run 'spidev_test' on dev:ssp1 on Phytec board?
I could not see any 'SPI CLK signal' on PCM-988/GPIO Expansion Board Patch Field 43E although I was able to run 'spidev_test'.
I am wondering whether it's hardware related or just firmware's problem?
If you can run 'spidev_test' on your phytec board on dev:ssp1, then I can rule out the possibility of hardware fault.

I am waiting for the arrival of our Hardware debugger TRACE32, which is the last resort.

Thanks

Regards,
Quentin