Re: [Pgubook-readers] Counters and register size

[Herbert R Coburn]

On 11/20/2012 02:13 PM, Woolly Thinking wrote:
> The very simplest answer to register - cpu size is that it is the number of wires that carry the 
> cpu instructions or data.  This is a slight over simplification but 16 bit cpu's basicaly use 16 
> wires, 32 bit cpu's use 32 wires, etc  When you hear that a computer has 64 bit addressability it 
> means that it has the wiring for 64 "on/off" states carried on the individual wires.  
> These in turn mean that 64 on-off states provide the highest binary number that can be defined by 
> that number of bits.  The  "word" originally came from the concept of one individual 
> wiring state that transmitted a computer logical concept within a the limits of the cpu's wiring.  
> So a 16 bit computer's word was 16 bits.  The wiring of a computer corresponds in all respects to 
> this word size.  Every register is 16 bits on a 16 bit computer.

Definitions must have changed back as I've aged. There was a time,
ca. 1960's, when a word was equal to the register size, for
example, DEC's PDP's 12-bit words. Later, a word was standardized
to 16-bits or two bytes. Thus in programming languages such as C,
there are types equal to binary (one bit), nybble (four bits),
byte (eight bits), word (16 bits), double-word (32 bits), and quad-
word (64 bits). The original Inel CPU, the 4004, had 4-bit
registers. The 8080/Z80 (TRS-80 computers) and 6502 (Apple ][) had
eight-bit registers that could be paired to make a 16-bit register.
The 8086, ancestor to today's CPU's had eight-bit registers that
were normally paired as 16-bit registers. One of the big differences
in these CPU's were how that fetched (pulled) memory into the
registers. Prior to the 8086, memory was fetched one byte at a
time. The 8086 fetched two bytes (a full word) at a time. The
80386 fetched four bytes.

> The counter is a register that holds the address of the next executable 
> instruction.  This is a binary number that specifies an address in ram 
> (addressability).  This counter is incremented by the next fetch cycle.  It can 
> also be altered by programming in which the old value is saved (for later 
> restoration) and a new value provided.  This is the basis for all branch,  
> perform, and goto instructions in all languages.  Assembler does this but 
> requires programmer effort.

Counter size is not necessarily related to register size. The
8086 had a conceptual register, such as bc, of 16-bits, but
the complicated structure of the counter resulted in a 20-bit
address range.

The initial address of the counter when you turn your computer
on is hard-wired in the CPU. Intel CPU's tend to point at
the lowest address. Motorola/IBM CPU's tend to point at the
highest possible address that could contain a JMP instruction
to the boot code. At least they used to.

I've been on the fringes of computer programming since 1989, so
I don't know how today's CPU's really function. Luckily, AMD's
CPU's still run 80486 code so I can still get by.

As you study, consider programming useful applications on an
eight-bit CPU that could only address 64K of memory, of which
16K was used by the operating system, running at 1MHz. I am
absolutely amazed that today's applications on 64-bit quad-core
CPU's running at 1.5 to 3GHZ (up to 3,000 times faster) with
multi-GB memories crawl compared to some of the applications
written in the 1970's. Programmers have grown so lazy.

herbc