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[Qemu-arm] [PATCH v2 04/19] include/qom/cpu.h: Add new get_phys_page_att
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH v2 04/19] include/qom/cpu.h: Add new get_phys_page_attrs_debug method |
Date: |
Mon, 16 Nov 2015 14:05:08 +0000 |
Add a new optional method get_phys_page_attrs_debug to CPUClass.
This is like the existing get_phys_page_debug, but also returns
the memory transaction attributes to use for the access.
This will be necessary for CPUs which have multiple address
spaces and use the attributes to select the correct address
space.
We provide a wrapper function cpu_get_phys_page_attrs_debug()
which falls back to the existing get_phys_page_debug(), so we
don't need to change every target CPU.
Signed-off-by: Peter Maydell <address@hidden>
---
include/qom/cpu.h | 36 ++++++++++++++++++++++++++++++++++--
1 file changed, 34 insertions(+), 2 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index ae17932..58605a5 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -98,6 +98,10 @@ struct TranslationBlock;
* #TranslationBlock.
* @handle_mmu_fault: Callback for handling an MMU fault.
* @get_phys_page_debug: Callback for obtaining a physical address.
+ * @get_phys_page_attrs_debug: Callback for obtaining a physical address and
the
+ * associated memory transaction attributes to use for the access.
+ * CPUs which use memory transaction attributes should implement this
+ * instead of get_phys_page_debug.
* @gdb_read_register: Callback for letting GDB read a register.
* @gdb_write_register: Callback for letting GDB write a register.
* @debug_excp_handler: Callback for handling debug exceptions.
@@ -152,6 +156,8 @@ typedef struct CPUClass {
int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
int mmu_index);
hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
+ hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr,
+ MemTxAttrs *attrs);
int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
void (*debug_excp_handler)(CPUState *cpu);
@@ -445,6 +451,32 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf,
#ifndef CONFIG_USER_ONLY
/**
+ * cpu_get_phys_page_attrs_debug:
+ * @cpu: The CPU to obtain the physical page address for.
+ * @addr: The virtual address.
+ * @attrs: Updated on return with the memory transaction attributes to use
+ * for this access.
+ *
+ * Obtains the physical page corresponding to a virtual one, together
+ * with the corresponding memory transaction attributes to use for the access.
+ * Use it only for debugging because no protection checks are done.
+ *
+ * Returns: Corresponding physical page address or -1 if no page found.
+ */
+static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+ MemTxAttrs *attrs)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+
+ if (cc->get_phys_page_attrs_debug) {
+ return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
+ }
+ /* Fallback for CPUs which don't implement the _attrs_ hook */
+ *attrs = MEMTXATTRS_UNSPECIFIED;
+ return cc->get_phys_page_debug(cpu, addr);
+}
+
+/**
* cpu_get_phys_page_debug:
* @cpu: The CPU to obtain the physical page address for.
* @addr: The virtual address.
@@ -456,9 +488,9 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf,
*/
static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
{
- CPUClass *cc = CPU_GET_CLASS(cpu);
+ MemTxAttrs attrs = {};
- return cc->get_phys_page_debug(cpu, addr);
+ return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
}
#endif
--
1.9.1
- [Qemu-arm] [PATCH v2 00/19] Add support for multiple address spaces per CPU and use it for ARM TrustZone, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 19/19] HACK: rearrange the virt memory map to suit OP-TEE, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 16/19] target-arm: Support multiple address spaces in page table walks, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 09/19] exec.c: Use cpu_get_phys_page_attrs_debug, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 17/19] hw/arm/virt: Wire up memory region to CPUs explicitly, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 18/19] [RFC] hw/arm/virt: add secure memory region and UART, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 05/19] include/qom/cpu.h: Add new asidx_from_attrs method, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 12/19] qom/cpu: Add MemoryRegion property, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 15/19] target-arm: Implement cpu_get_phys_page_attrs_debug, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 01/19] exec.c: Don't set cpu->as until cpu_address_space_init, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 04/19] include/qom/cpu.h: Add new get_phys_page_attrs_debug method,
Peter Maydell <=
- [Qemu-arm] [PATCH v2 14/19] target-arm: Implement asidx_from_attrs, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 02/19] exec.c: Allow target CPUs to define multiple AddressSpaces, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 03/19] exec-all.h: Document tlb_set_page_with_attrs, tlb_set_page, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 07/19] exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 10/19] exec.c: Use correct AddressSpace in watch_mem_read and watch_mem_write, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 13/19] target-arm: Add QOM property for Secure memory region, Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 11/19] memory: Add address_space_init_shareable(), Peter Maydell, 2015/11/16
- [Qemu-arm] [PATCH v2 06/19] cputlb.c: Use correct address space when looking up MemoryRegionSection, Peter Maydell, 2015/11/16