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[Qemu-arm] [PATCH v3 07/19] exec.c: Pass MemTxAttrs to iotlb_to_region s
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH v3 07/19] exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS |
Date: |
Thu, 14 Jan 2016 13:52:43 +0000 |
Pass the MemTxAttrs for the memory access to iotlb_to_region(); this
allows it to determine the correct AddressSpace to use for the lookup.
Signed-off-by: Peter Maydell <address@hidden>
Acked-by: Edgar E. Iglesias <address@hidden>
---
cputlb.c | 6 ++++--
exec.c | 5 +++--
include/exec/exec-all.h | 2 +-
softmmu_template.h | 4 ++--
4 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index f1c1082..f6fb161 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -449,6 +449,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1,
target_ulong addr)
void *p;
MemoryRegion *mr;
CPUState *cpu = ENV_GET_CPU(env1);
+ CPUIOTLBEntry *iotlbentry;
page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
mmu_idx = cpu_mmu_index(env1, true);
@@ -456,8 +457,9 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1,
target_ulong addr)
(addr & TARGET_PAGE_MASK))) {
cpu_ldub_code(env1, addr);
}
- pd = env1->iotlb[mmu_idx][page_index].addr & ~TARGET_PAGE_MASK;
- mr = iotlb_to_region(cpu, pd);
+ iotlbentry = &env1->iotlb[mmu_idx][page_index];
+ pd = iotlbentry->addr & ~TARGET_PAGE_MASK;
+ mr = iotlb_to_region(cpu, pd, iotlbentry->attrs);
if (memory_region_is_unassigned(mr)) {
CPUClass *cc = CPU_GET_CLASS(cpu);
diff --git a/exec.c b/exec.c
index 884586a..5bd3045 100644
--- a/exec.c
+++ b/exec.c
@@ -2238,9 +2238,10 @@ static uint16_t dummy_section(PhysPageMap *map,
AddressSpace *as,
return phys_section_add(map, §ion);
}
-MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index)
+MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs)
{
- CPUAddressSpace *cpuas = &cpu->cpu_ases[0];
+ int asidx = cpu_asidx_from_attrs(cpu, attrs);
+ CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch);
MemoryRegionSection *sections = d->map.sections;
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index ee9757f..587736e 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -403,7 +403,7 @@ extern uintptr_t tci_tb_ptr;
#if !defined(CONFIG_USER_ONLY)
struct MemoryRegion *iotlb_to_region(CPUState *cpu,
- hwaddr index);
+ hwaddr index, MemTxAttrs attrs);
void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr);
diff --git a/softmmu_template.h b/softmmu_template.h
index 6803890..208f808 100644
--- a/softmmu_template.h
+++ b/softmmu_template.h
@@ -150,7 +150,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState
*env,
uint64_t val;
CPUState *cpu = ENV_GET_CPU(env);
hwaddr physaddr = iotlbentry->addr;
- MemoryRegion *mr = iotlb_to_region(cpu, physaddr);
+ MemoryRegion *mr = iotlb_to_region(cpu, physaddr, iotlbentry->attrs);
physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
cpu->mem_io_pc = retaddr;
@@ -357,7 +357,7 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
{
CPUState *cpu = ENV_GET_CPU(env);
hwaddr physaddr = iotlbentry->addr;
- MemoryRegion *mr = iotlb_to_region(cpu, physaddr);
+ MemoryRegion *mr = iotlb_to_region(cpu, physaddr, iotlbentry->attrs);
physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
if (mr != &io_mem_rom && mr != &io_mem_notdirty && !cpu->can_do_io) {
--
1.9.1
- [Qemu-arm] [PATCH v3 00/19] Add support for multiple address spaces per CPU and use it for ARM TrustZone, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 03/19] exec-all.h: Document tlb_set_page_with_attrs, tlb_set_page, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 17/19] hw/arm/virt: Wire up memory region to CPUs explicitly, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 07/19] exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS,
Peter Maydell <=
- [Qemu-arm] [PATCH v3 14/19] target-arm: Implement asidx_from_attrs, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 10/19] exec.c: Use correct AddressSpace in watch_mem_read and watch_mem_write, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 19/19] HACK: rearrange the virt memory map to suit OP-TEE, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 02/19] exec.c: Allow target CPUs to define multiple AddressSpaces, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 06/19] cputlb.c: Use correct address space when looking up MemoryRegionSection, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 12/19] qom/cpu: Add MemoryRegion property, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 18/19] hw/arm/virt: add secure memory region and UART, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 01/19] exec.c: Don't set cpu->as until cpu_address_space_init, Peter Maydell, 2016/01/14
- [Qemu-arm] [PATCH v3 15/19] target-arm: Implement cpu_get_phys_page_attrs_debug, Peter Maydell, 2016/01/14