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Re: [Qemu-arm] [PATCH 0/6] Add i.MX6 (Single/Dual/Quad) support

From: Jean-Christophe DUBOIS
Subject: Re: [Qemu-arm] [PATCH 0/6] Add i.MX6 (Single/Dual/Quad) support
Date: Thu, 28 Jan 2016 20:22:52 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1

Hello Peter,

Le 28/01/2016 15:57, Peter Maydell a écrit :
On 26 January 2016 at 21:44, Jean-Christophe Dubois <address@hidden> wrote:
This patch series adds support for the Freescale i.MX6 processor.

For now we only support the following devices:
* up to 4 Cortex A9 cores
* 5 i.MX UARTs
* 2 EPIT timers
* 1 GPT timer
* 7 GPIO controllers
* 6 SDHC controllers
* 1 CCM device
* 1 SRC device
* various ROM/RAM areas.

This also adds the sabrelite board as a an actual platform for i.MX6.

This series was tested by booting a 4.4 linux kernel (using the
imx_v6_v7_defconfig file as kernel configuration).

Note: In order for Linux to work I had to customize a bit the
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi device tree file.
What changes did you have to make to the dt, and why?

Please find attached the diff file for the linux imx6qdl-sabrelite.dtsi file.

Basically, it boils down to the following:
  • Sabrelite uses uart2 for console but on qemu, this is uart1 that is wired to the default stdout. Consequently, I changed stdout-path in "chosen" to uart1.
  • For now i.MX6 SOC code does not emulate SPI controller. During the boot Linux was getting stuck trying to access a SPI device that is supposed to be there. Therefore I disabled the SPI controller in the device tree.
  • The sabrelite is supposed to have a bunch of push buttons (home, power, back, vol up, vol down) wired to various GPIOs. I guess these buttons might have pull up or pull down resistors on the real hardware but obviously on qemu we have no such things. As a results the GPIOs were triggering a lot of interrupts for nothing. So I commented out the GPIO sections were the buttons were defined.


-- PMM

Attachment: imx6qdl-sabrelite.dtsi.diff
Description: Text Data

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