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Re: [Qemu-arm] [PATCH v5 5/9] target-mips: Activate IEEE 274-2008 signal
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From: |
Maciej W. Rozycki |
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Subject: |
Re: [Qemu-arm] [PATCH v5 5/9] target-mips: Activate IEEE 274-2008 signaling NaN bit meaning |
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Date: |
Mon, 25 Apr 2016 15:06:07 +0100 |
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User-agent: |
Alpine 2.00 (DEB 1167 2008-08-23) |
On Mon, 18 Apr 2016, Aleksandar Markovic wrote:
> Functions mips_cpu_reset() and msa_reset() are updated so that flag
> snan_bit_is_one is properly set for any Mips FPU/MSA configuration.
> For main FPUs, CPUs with FCR31's FCR31_NAN2008 bit set will invoke
> set_snan_bit_is_one(0). For MSA, as it is IEEE 274-2008 compliant
> from it inception, set_snan_bit_is_one(0) will always be invoked.
I have skimmed over the series -- have you lost MIPSr3 support (writable
FCSR ABS2008 and NAN2008 bits) in porting?
Maciej
- [Qemu-arm] [PATCH v5 0/9] target-mips: Initiate IEEE 754-2008 support for Mips, Aleksandar Markovic, 2016/04/18
- [Qemu-arm] [PATCH v5 8/9] target-mips: Clean up position and order of helpers for CVT.<L|W>.<S|D>, Aleksandar Markovic, 2016/04/18
- [Qemu-arm] [PATCH v5 6/9] target-mips: Add abs2008 flavor of <ABS|NEG>.<S|D>, Aleksandar Markovic, 2016/04/18
- [Qemu-arm] [PATCH v5 4/9] target-mips: Amend processor definitions in relation to FCR31, Aleksandar Markovic, 2016/04/18
- [Qemu-arm] [PATCH v5 2/9] softfloat: For Mips only, correct default NaN values, Aleksandar Markovic, 2016/04/18
- [Qemu-arm] [PATCH v5 7/9] target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>, Aleksandar Markovic, 2016/04/18