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Re: [Qemu-arm] [RFC v3 PATCH 04/14] tcg/arm: Add support for fence
From: |
Alex Bennée |
Subject: |
Re: [Qemu-arm] [RFC v3 PATCH 04/14] tcg/arm: Add support for fence |
Date: |
Thu, 23 Jun 2016 17:30:29 +0100 |
User-agent: |
mu4e 0.9.17; emacs 25.0.95.3 |
Pranith Kumar <address@hidden> writes:
> Cc: Andrzej Zaborowski <address@hidden>
> Cc: Peter Maydell <address@hidden>
> Signed-off-by: Pranith Kumar <address@hidden>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> tcg/arm/tcg-target.inc.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
> index f9f54c6..1447aa8 100644
> --- a/tcg/arm/tcg-target.inc.c
> +++ b/tcg/arm/tcg-target.inc.c
> @@ -313,6 +313,10 @@ typedef enum {
> INSN_LDRD_REG = 0x000000d0,
> INSN_STRD_IMM = 0x004000f0,
> INSN_STRD_REG = 0x000000f0,
> +
> + INSN_DMB_ISH = 0x5bf07ff5,
> + INSN_DMB_MCR = 0xba0f07ee,
Again I think you might want to split the instruction encoding. Also
where did you get these encoding from? Is it right the byte-order has
been reversed if it is being written out by endian aware helpers?
> +
> } ARMInsn;
>
> #define SHIFT_IMM_LSL(im) (((im) << 7) | 0x00)
> @@ -1066,6 +1070,15 @@ static inline void tcg_out_goto_label(TCGContext *s,
> int cond, TCGLabel *l)
> }
> }
>
> +static inline void tcg_out_mb(TCGContext *s, TCGArg a0)
> +{
> + if (use_armv7_instructions) {
> + tcg_out32(s, INSN_DMB_ISH);
> + } else if (use_armv6_instructions) {
> + tcg_out32(s, INSN_DMB_MCR);
> + }
> +}
> +
> #ifdef CONFIG_SOFTMMU
> /* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
> * int mmu_idx, uintptr_t ra)
> @@ -1923,6 +1936,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
> opc,
> tcg_out_udiv(s, COND_AL, args[0], args[1], args[2]);
> break;
>
> + case INDEX_op_mb:
> + tcg_out_mb(s, args[0]);
> + break;
> +
> case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
> case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
> case INDEX_op_call: /* Always emitted via tcg_out_call. */
> @@ -1997,6 +2014,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
> { INDEX_op_div_i32, { "r", "r", "r" } },
> { INDEX_op_divu_i32, { "r", "r", "r" } },
>
> + { INDEX_op_mb, { } },
> { -1 },
> };
--
Alex Bennée