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[Qemu-arm] AArch64 memory layout
From: |
Yury Usishchev |
Subject: |
[Qemu-arm] AArch64 memory layout |
Date: |
Thu, 23 Jun 2016 22:22:06 +0300 |
User-agent: |
Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) |
Hello!
I found that address space for AArch64 is considered to be 64bit:
target-arm/cpu.h:1776:
#if defined(TARGET_AARCH64)
# define TARGET_PHYS_ADDR_SPACE_BITS 48
# define TARGET_VIRT_ADDR_SPACE_BITS 64
#else
# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
But from kernel side it is either 39 or 42 or 48 bit:
https://www.kernel.org/doc/Documentation/arm64/memory.txt
This causes problems with address sanitizer usage under qemu. ASAN under qemu
detects address space as 39 bits. When
host mmap returns value over 1<<39 (this can happen on x86_64) ASAN causes
segmentation fault.
If TARGET_VIRT_ADDR_SPACE_BITS is changed to 39, runtime checks prevents
mapping from bigger addresses and everything is
fine. But this is not a correct solution as mappings can be also 42 or 48.
So the question is should TARGET_VIRT_ADDR_SPACE_BITS be changed and how?
BR,
Yury Usishchev
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