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Re: [Qemu-arm] [PATCH 2/2] target/arm: lie more convincingly about memor
Re: [Qemu-arm] [PATCH 2/2] target/arm: lie more convincingly about memory attributes in PAR_EL1
Tue, 28 Feb 2017 22:52:05 +0000
On 28 February 2017 at 21:58, Andrew Baumann
> On a successful long-descriptor translation, PAR_EL1 bits 56:63 are
> expected to report the memory attributes of the page. However, the
> page table walker (get_phys_addr()) does not currently retrieve these
> attributes. Rather than leaving these bits clear (which implies
> uncacheable device memory), this change sets them to 0xff, which
> corresponds to write-back cached normal memory.
> Signed-off-by: Andrew Baumann <address@hidden>
> In my (biased!) opinion, this is a better lie to tell for an emulated
> environment. It also happens to un-break the Windows boot process, and
> enable an NT kernel optimisation (DC ZVA for page zeroing).
It's not clear to me that misreporting Device memory as
Normal is any better than misreporting Normal memory as
Device -- at least, it seems like it might break currently
I think it would be safer to implement the PAR as "honour the
attribute index bits in page table descriptors and return
the corresponding bits from the MAIR registers".