Re: [Qemu-arm] about armv8's prefetch decode

[Wangjintang]

Hi Peter,

        At first thanks your reply.
I add detail illustration at below:

> -----Original Message-----
> From: Peter Maydell [mailto:address@hidden
> Sent: Friday, March 24, 2017 1:05 AM
> To: Wangjintang
> Cc: qemu-arm; Shlomo Pongratz (A); Ori Chalak (A)
> Subject: Re: [Qemu-arm] about armv8's prefetch decode
> 
> On 20 March 2017 at 06:35, Wangjintang <address@hidden>
> wrote:
> >         We see that armv8's prefetch instruction decode have been
> > skipped in qemu. For some user, they need prefetch instruction,
> > for example, they use qemu to generate the instruction trace.
> > We want to merge this patch to community, it's ok or not?  Thanks.
> 
> It would be helpful if you could be more precise about what
> is missing and what goes wrong (eg which instructions we
> mishandle). In general I believe that we do correctly handle
> the various prefetch instructions. They don't need to generate
> any intermediate code, of course, because prefetch is just
> a hint. It's possible we got the decode wrong for some subset
> of them.
> 
> thanks
> -- PMM

  You're right. For function model don't need generate 
intermediate code for prefetch instructions. But for simulator user, 
they need entirely Armv8's instruction and ld/st instruction's memory address.
Current code that skip generate prefetch instructions' intermediate code, 
so for simulator user, they can't get the prefetch instruction relative 
memory address. 
  The patch is for this case. Generate intermediate code for prefetch 
instruction code, at the same time don't effect the value in rm/rt register.   

Best Regards,
Wang jintang / Jed

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