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Re: [Qemu-arm] [Qemu-devel] [PATCH v2] target/arm: Fix stlxp for aarch64

From: Richard Henderson
Subject: Re: [Qemu-arm] [Qemu-devel] [PATCH v2] target/arm: Fix stlxp for aarch64_be
Date: Mon, 1 Jan 2018 15:06:21 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0

On 12/30/2017 02:56 PM, Michael Weiser wrote:
> ldxp loads two consecutive doublewords from memory regardless of CPU
> endianness. On store, stlxp currently assumes to work with a 128bit
> value and consequently switches order in big-endian mode. With this
> change it packs the doublewords in reverse order in anticipation of the
> 128bit big-endian store operation interposing them so they end up in
> memory in the right order. This makes it work for both MTTCG and !MTTCG.
> It effectively implements the ARM ARM STLXP operation pseudo-code:
> data = if BigEndian() then el1:el2 else el2:el1;
> With this change an aarch64_be Linux 4.14.4 kernel succeeds to boot up
> in system emulation mode.
> Signed-off-by: Michael Weiser <address@hidden>
> ---
>  target/arm/helper-a64.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> v2:
> - make it work for MTTCG as well by catering to the 128bit expectation

Reviewed-by: Richard Henderson <address@hidden>

> +     * 128bit store but two doulbewords stored consecutively */
                               ^^ typo


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