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Re: [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block
From: |
Michael S. Tsirkin |
Subject: |
Re: [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block |
Date: |
Fri, 9 Feb 2018 02:08:03 +0200 |
On Thu, Feb 08, 2018 at 12:43:03PM -0800, Andrey Smirnov wrote:
> On Thu, Feb 8, 2018 at 12:33 PM, Michael S. Tsirkin <address@hidden> wrote:
> > On Thu, Feb 08, 2018 at 12:22:53PM -0800, Andrey Smirnov wrote:
> >> On Thu, Feb 8, 2018 at 12:11 PM, Michael S. Tsirkin <address@hidden> wrote:
> >> > On Thu, Feb 08, 2018 at 12:03:04PM -0800, Andrey Smirnov wrote:
> >> >> >> +#define PCIE_PORT_LINK_CONTROL 0x710
> >> >> >> +
> >> >> >> +#define PCIE_PHY_DEBUG_R1 0x72C
> >> >> >> +#define PCIE_PHY_DEBUG_R1_XMLH_LINK_UP BIT(4)
> >> >> >> +
> >> >> >> +#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
> >> >> >> +#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
> >> >> >> +
> >> >> >> +#define PCIE_MSI_ADDR_LO 0x820
> >> >> >> +#define PCIE_MSI_ADDR_HI 0x824
> >> >> >> +#define PCIE_MSI_INTR0_ENABLE 0x828
> >> >> >> +#define PCIE_MSI_INTR0_MASK 0x82C
> >> >> >> +#define PCIE_MSI_INTR0_STATUS 0x830
> >> >> >> +
> >> >> >> +#define PCIE_ATU_VIEWPORT 0x900
> >> >> >> +#define PCIE_ATU_REGION_INBOUND (0x1 << 31)
> >> >> >> +#define PCIE_ATU_REGION_OUTBOUND (0x0 << 31)
> >> >> >> +#define PCIE_ATU_REGION_INDEX2 (0x2 << 0)
> >> >> >> +#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
> >> >> >> +#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)
> >> >> >> +#define PCIE_ATU_CR1 0x904
> >> >> >> +#define PCIE_ATU_TYPE_MEM (0x0 << 0)
> >> >> >> +#define PCIE_ATU_TYPE_IO (0x2 << 0)
> >> >> >> +#define PCIE_ATU_TYPE_CFG0 (0x4 << 0)
> >> >> >> +#define PCIE_ATU_TYPE_CFG1 (0x5 << 0)
> >> >> >> +#define PCIE_ATU_CR2 0x908
> >> >> >> +#define PCIE_ATU_ENABLE (0x1 << 31)
> >> >> >> +#define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30)
> >> >> >> +#define PCIE_ATU_LOWER_BASE 0x90C
> >> >> >> +#define PCIE_ATU_UPPER_BASE 0x910
> >> >> >> +#define PCIE_ATU_LIMIT 0x914
> >> >> >> +#define PCIE_ATU_LOWER_TARGET 0x918
> >> >> >> +#define PCIE_ATU_BUS(x) (((x) >> 24) & 0xff)
> >> >> >> +#define PCIE_ATU_DEVFN(x) (((x) >> 16) & 0xff)
> >> >> >> +#define PCIE_ATU_UPPER_TARGET 0x91C
> >> >
> >> > Can you avoid a PCIE prefix for this btw?
> >> >
> >>
> >> That's how those constants were named in Linux kernel, but yeah, I'll
> >> add a prefix to them.
> >>
> >> Thanks,
> >> Andrey Smirnov
> >
> > In that case you should not copy it into your file.
> > Stuff from linux kernel should be imported into standard-headers.
> >
>
> Just to be sure we are on the same page, this is the file I am talking about:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/dwc/pcie-designware.h?h=v4.15
>
> you want me to put it in standard-headers/linux and get those
> constants from there?
>
> Thanks,
> Andrey Smirnov
Oh it's from a source file. I see. standard-headers/linux is for
files exported from include/uapi.
I take it back then but pls rename appropriately - and I guess
you should only copy what you actually use.
--
MST
- [Qemu-arm] [PATCH v5 11/14] usb: Add basic code to emulate Chipidea USB IP, (continued)
- [Qemu-arm] [PATCH v5 11/14] usb: Add basic code to emulate Chipidea USB IP, Andrey Smirnov, 2018/02/06
- [Qemu-arm] [PATCH v5 13/14] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c, Andrey Smirnov, 2018/02/06
- [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block, Andrey Smirnov, 2018/02/06
- Re: [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block, Michael S. Tsirkin, 2018/02/08
- Re: [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block, Andrey Smirnov, 2018/02/08
- Re: [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block, Michael S. Tsirkin, 2018/02/08
- Re: [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block, Andrey Smirnov, 2018/02/08
- Re: [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block, Michael S. Tsirkin, 2018/02/08
- Re: [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block, Andrey Smirnov, 2018/02/08
- Re: [Qemu-arm] [PATCH v5 10/14] pci: Add support for Designware IP block,
Michael S. Tsirkin <=
[Qemu-arm] [PATCH v5 12/14] i.MX: Add i.MX7 SOC implementation., Andrey Smirnov, 2018/02/06
Re: [Qemu-arm] [PATCH v5 00/14] Initial i.MX7 support, Peter Maydell, 2018/02/08