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Re: [Qemu-arm] [Qemu-devel] [PATCH v2 06/11] hw/intc/armv7m_nvic: Implem


From: Richard Henderson
Subject: Re: [Qemu-arm] [Qemu-devel] [PATCH v2 06/11] hw/intc/armv7m_nvic: Implement SCR
Date: Fri, 9 Feb 2018 13:03:51 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0

On 02/09/2018 08:58 AM, Peter Maydell wrote:
> We were previously making the system control register (SCR)
> just RAZ/WI. Although we don't implement the functionality
> this register controls, we should at least provide the state,
> including the banked state for v8M.
> 
> Signed-off-by: Peter Maydell <address@hidden>
> ---
>  target/arm/cpu.h      |  7 +++++++
>  hw/intc/armv7m_nvic.c | 12 ++++++++----
>  target/arm/machine.c  | 12 ++++++++++++
>  3 files changed, 27 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


r~




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