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Re: [Qemu-arm] [PATCH v4 00/31] Add ARMv8.2 half-precision functions


From: Peter Maydell
Subject: Re: [Qemu-arm] [PATCH v4 00/31] Add ARMv8.2 half-precision functions
Date: Wed, 28 Feb 2018 15:02:07 +0000

On 28 February 2018 at 13:32, Alex Bennée <address@hidden> wrote:
> Peter Maydell <address@hidden> writes:
>> (3) Is this complete fp16 support or are there still more pieces to come?
>> I'm assuming it's all done...
>
> All AArch64 is done. I'm not sure how much AArch32 is needed for SVE
> support. The ARM ARM says "When this feature is implemented it is
> implemented in both Advanced SIMD and floating-point, and in AArch64 and
> AArch32 states." but I think it is legal to have a 64 bit only CPU
> without AArch32?

64-bit only is legal, but none of our current implemented CPUs
(including the proposed "max") are 64-bit only :-)
For linux-user it doesn't matter, because the code will only
run as AArch64 anyway, but before we advertise it in the ID
registers for system emulation I would definitely prefer to have
the AArch32 instructions.

Do you have a feel for how much work the AArch32 side is?

thanks
-- PMM



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