Re: [Qemu-arm] ARMv7-M MemManage vector trap

[Elliot Buller]

Ok, thanks for the clarification. It's definitely breaking on the MPUFault ISR when I try and single step over an instruction that causes a fault. I'll debug on the GDB side to see why this is.

Best,

Elliot

On Mon, May 21, 2018 at 11:14 AM, Peter Maydell <address@hidden> wrote:

On 21 May 2018 at 19:04, Elliot Buller <address@hidden> wrote:
> Sorry I misspoke. I still need the MM fault active since my handler does
> some register patching necessary for normal operation. I just need to
> disable gdb from breaking when entering the ISR.

I don't think gdb will break by default when the guest enters
an exception handler, unless you ask it to. So I'm not entirely
sure what you're after here.

thanks
-- PMM

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