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From: | Richard Henderson |
Subject: | Re: [Qemu-arm] [Qemu-devel] [PATCH 07/10] target/arm: Implement HCR.PTW |
Date: | Mon, 15 Oct 2018 08:38:13 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 |
On 10/12/18 7:42 AM, Peter Maydell wrote: > If the HCR_EL2 PTW virtualizaiton configuration register bit > is set, then this means that a stage 2 Permission fault must > be generated if a stage 1 translation table access is made > to an address that is mapped as Device memory in stage 2. > Implement this. > > Signed-off-by: Peter Maydell <address@hidden> > --- > target/arm/helper.c | 21 ++++++++++++++++++++- > 1 file changed, 20 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson <address@hidden> r~
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