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[Qemu-commits] [qemu/qemu] 2e1549: target-mips: add privilege level chec
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[Qemu-commits] [qemu/qemu] 2e1549: target-mips: add privilege level check to several ... |
Date: |
Mon, 27 Aug 2012 14:30:10 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 2e15497c5b8d0d172dece0cf56e2d2e977a6b679
https://github.com/qemu/qemu/commit/2e15497c5b8d0d172dece0cf56e2d2e977a6b679
Author: Eric Johnson <address@hidden>
Date: 2012-08-27 (Mon, 27 Aug 2012)
Changed paths:
M target-mips/translate.c
Log Message:
-----------
target-mips: add privilege level check to several Cop0 instructions
The MIPS Architecture Verification Programs (AVPs) check privileged
instructions for the required privilege level. These changes are needed
to pass the AVP suite.
Signed-off-by: Eric Johnson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 36c6711bbe79642b0102416a9dd4243505e874a6
https://github.com/qemu/qemu/commit/36c6711bbe79642b0102416a9dd4243505e874a6
Author: Eric Johnson <address@hidden>
Date: 2012-08-27 (Mon, 27 Aug 2012)
Changed paths:
M target-mips/translate.c
Log Message:
-----------
target-mips: allow microMIPS SWP and SDP to have RD equal to BASE
The microMIPS SWP and SDP instructions do not modify GPRs. So their
behavior is well defined when RD equals BASE. The MIPS Architecture
Verification Programs (AVPs) check that they work as expected. This
is required for AVPs to pass.
Signed-off-by: Eric Johnson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Compare: https://github.com/qemu/qemu/compare/08406b035edc...36c6711bbe79
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