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[Qemu-commits] [qemu/qemu] 6977af: ppc/kvm: check some capabilities with


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 6977af: ppc/kvm: check some capabilities with kvm_vm_check...
Date: Wed, 27 Sep 2017 14:43:09 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 6977afda16c1e09dfbce4bdd877459a287269b72
      
https://github.com/qemu/qemu/commit/6977afda16c1e09dfbce4bdd877459a287269b72
  Author: Greg Kurz <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M target/ppc/kvm.c

  Log Message:
  -----------
  ppc/kvm: check some capabilities with kvm_vm_check_extension()

The following capabilities are VM specific:
- KVM_CAP_PPC_SMT_POSSIBLE
- KVM_CAP_PPC_HTAB_FD
- KVM_CAP_PPC_ALLOC_HTAB

If both KVM HV and KVM PR are present, checking them always return
the HV value, even if we explicitely requested to use PR.

This has no visible effect for KVM_CAP_PPC_ALLOC_HTAB, because we also
try the KVM_PPC_ALLOCATE_HTAB ioctl which is only suppored by HV. As
a consequence, the spapr code doesn't even check KVM_CAP_PPC_HTAB_FD.

However, this will cause kvmppc_hint_smt_possible(), introduced by
commit fa98fbfcdfcb9, to report several VSMT modes (eg, Available
VSMT modes: 8 4 2 1) whereas PR only support mode 1.

This patch fixes all three anyway to use kvm_vm_check_extension(). It
is okay since the VM is already created at the time kvm_arch_init() or
kvmppc_reset_htab() is called.

Signed-off-by: Greg Kurz <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 712b25c4cbf6c124a40e6790559188385aa558f6
      
https://github.com/qemu/qemu/commit/712b25c4cbf6c124a40e6790559188385aa558f6
  Author: Greg Kurz <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M target/ppc/kvm.c
    M target/ppc/kvm_ppc.h

  Log Message:
  -----------
  ppc/kvm: drop kvmppc_has_cap_htab_fd()

It never got used since its introduction (commit 7c43bca004af).

Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: d7145b66c690ced1f8774a5fc1ffc284a3bb8097
      
https://github.com/qemu/qemu/commit/d7145b66c690ced1f8774a5fc1ffc284a3bb8097
  Author: BALATON Zoltan <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/usb/hcd-ohci.c

  Log Message:
  -----------
  ohci: Allow sysbus version to be used as a companion

Some PPC SoCs have an EHCI with OHCI companion USB controller. To
emulate this allow the sysbus version of OHCI to be used as a companion.

Signed-off-by: BALATON Zoltan <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 9ffe4ce56b9de8416c6e1b7a1db416159157bdf8
      
https://github.com/qemu/qemu/commit/9ffe4ce56b9de8416c6e1b7a1db416159157bdf8
  Author: BALATON Zoltan <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/usb/hcd-ehci-sysbus.c
    M hw/usb/hcd-ehci.h

  Log Message:
  -----------
  ehci: Add ppc4xx-ehci for the USB 2.0 controller in embedded PPC SoCs

Some PPC SoCs have an EHCI with OHCI companion USB controller. Add a
new type for this similar to types used for other embedded SoCs.

Signed-off-by: BALATON Zoltan <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 81bb29ace5ef5eef870c2fbf8f91247e57acff6d
      
https://github.com/qemu/qemu/commit/81bb29ace5ef5eef870c2fbf8f91247e57acff6d
  Author: BALATON Zoltan <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M target/ppc/cpu-models.c
    M target/ppc/cpu-models.h
    M target/ppc/translate_init.c

  Log Message:
  -----------
  ppc: Add 460EX embedded CPU

Despite its name it is a 440 core CPU

Signed-off-by: BALATON Zoltan <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 4c46f372b01cdc4045e25ba1283824ba95b1942c
      
https://github.com/qemu/qemu/commit/4c46f372b01cdc4045e25ba1283824ba95b1942c
  Author: BALATON Zoltan <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ppc/ppc405_uc.c

  Log Message:
  -----------
  ppc4xx: Add more PLB registers

These registers are present in 440 SoCs (and maybe in others too) and
U-Boot accesses them when printing register info. We don't emulate
these but add them to avoid crashing when they are read or written.

Signed-off-by: BALATON Zoltan <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: c8bd35260da8d48ddd82e5304a16f0cf724950a3
      
https://github.com/qemu/qemu/commit/c8bd35260da8d48ddd82e5304a16f0cf724950a3
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ppc/mac_oldworld.c

  Log Message:
  -----------
  ppc: QOMify g3beige machine

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 3c0622897e260c5461dd73ddd16fb8055966ea72
      
https://github.com/qemu/qemu/commit/3c0622897e260c5461dd73ddd16fb8055966ea72
  Author: Benjamin Herrenschmidt <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ppc/mac_newworld.c

  Log Message:
  -----------
  ppc/mac: Advertise a high clock frequency for NewWorld Macs

We use 900Mhz, otherwise MacOS X 10.5 refuses to install.

Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 77453882495b321404e874aa97bca1214160229d
      
https://github.com/qemu/qemu/commit/77453882495b321404e874aa97bca1214160229d
  Author: Benjamin Herrenschmidt <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/misc/macio/mac_dbdma.c

  Log Message:
  -----------
  ppc/mac: More rework of the DBDMA emulation

This completely reworks the handling of the control register
according to my understanding of the HW and the spec.

It should (hopefully ... still testing) fix a number of issues
most notably cases of MacOS hanging.

Also update dbdma_unassigned_rw() and dbdma_unassigned_flush() to
have the expected behaviour now that flush is handled slightly
differently.

Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 4f7265ff177df2886ccaed0bca318dc81a7f5e75
      
https://github.com/qemu/qemu/commit/4f7265ff177df2886ccaed0bca318dc81a7f5e75
  Author: Benjamin Herrenschmidt <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ide/macio.c
    M hw/ppc/mac.h

  Log Message:
  -----------
  ppc/ide/macio: Add missing registers

The timing register exists on all variants of MacIO IDE, we just
store and return its value.

The interrupts register only exists on KeyLargo but it doesn't
hurt to have it. The lack of this register causes MacOS X to
hangs under some circumstances.

Both are 32-bit only. The HW might support smaller access sizes
but no known OS uses them.

Because the core IDE subsystem doesn't provide us with a way
to query the main (level) interrupt state, nor do we have a way
to know that DBDMA issued a (edge) interrupt, we reflect both
through a private pair of qirq's in order to maintain the
register state.

Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 58b62835863db2164002ad843455045c29bcb029
      
https://github.com/qemu/qemu/commit/58b62835863db2164002ad843455045c29bcb029
  Author: Benjamin Herrenschmidt <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/intc/openpic.c
    M hw/ppc/mac_newworld.c
    M include/hw/ppc/openpic.h

  Log Message:
  -----------
  ppc: Fix OpenPIC model

Apple uses an IBM MPIC2A without timers, it has 64 sources.

Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 82be8e7394b31fd2d740651365b8ebdd0c847529
      
https://github.com/qemu/qemu/commit/82be8e7394b31fd2d740651365b8ebdd0c847529
  Author: Greg Kurz <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ppc/spapr.c
    M target/ppc/kvm.c

  Log Message:
  -----------
  ppc/kvm: change kvmppc_get_htab_fd() to return -errno on error

When kvmppc_get_htab_fd() fails, its return value is propagated up to
qemu_savevm_state_iterate() or to qemu_savevm_state_complete_precopy().
All savevm handlers expect to receive a negative errno on error.

Let's patch kvmppc_get_htab_fd() accordingly.

While here, let's change htab_load() in the spapr code to also
propagate the error, since it doesn't make sense to abort() if
we couldn't get the htab fd from KVM.

Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 14b0d748877d79d61017e7e38b1ae98c3fd339bc
      
https://github.com/qemu/qemu/commit/14b0d748877d79d61017e7e38b1ae98c3fd339bc
  Author: Greg Kurz <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ppc/spapr.c
    M target/ppc/kvm.c
    M target/ppc/kvm_ppc.h

  Log Message:
  -----------
  ppc/kvm: generalize the use of kvmppc_get_htab_fd()

The use of KVM_PPC_GET_HTAB_FD is open-coded in kvmppc_read_hptes()
and kvmppc_write_hpte().

This patch modifies kvmppc_get_htab_fd() so that it can be used
everywhere we need to access the in-kernel htab:
- add an index argument
  => only kvmppc_read_hptes() passes an actual index, all other users
     pass 0
- add an errp argument to propagate error messages to the caller.
  => spapr migration code prints the error
  => hpte helpers pass &error_abort to keep the current behavior
     of hw_error()

While here, this also fixes a bug in kvmppc_write_hpte() so that it
opens the htab fd for writing instead of reading as it currently does.
This never broke anything because we currently never call this code,
as explained in the changelog of commit c1385933804bb:

"This support updating htab managed by the hypervisor. Currently
 we don't have any user for this feature. This actually bring the
 store_hpte interface in-line with the load_hpte one. We may want
 to use this when we want to emulate henter hcall in qemu for HV
 kvm."

The above is still true today.

Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 332f7721cbee06d3720d4e2827c10a8b84d8ec19
      
https://github.com/qemu/qemu/commit/332f7721cbee06d3720d4e2827c10a8b84d8ec19
  Author: Greg Kurz <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  spapr: introduce helpers to migrate HPT chunks and the end marker

This consolidates some duplicated code in a dedicated helpers.

Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 5261158d21994d38e9e5cf3305691614fc2b1e09
      
https://github.com/qemu/qemu/commit/5261158d21994d38e9e5cf3305691614fc2b1e09
  Author: Eric Blake <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M include/hw/ppc/pnv_xscom.h

  Log Message:
  -----------
  ppc/pnv: Improve macro parenthesization

Although none of the existing macro call-sites were broken,
it's always better to write macros that properly parenthesize
arguments that can be complex expressions, so that the intended
order of operations is not broken.

Signed-off-by: Eric Blake <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 5abdf67009c44c7a288f2ca5ac9661a7aa0e1c7e
      
https://github.com/qemu/qemu/commit/5abdf67009c44c7a288f2ca5ac9661a7aa0e1c7e
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ide/macio.c

  Log Message:
  -----------
  macio: convert pmac_ide_ops from old_mmio

Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 30b3bc5aa9f4df68909b63c873a40469caf013dc
      
https://github.com/qemu/qemu/commit/30b3bc5aa9f4df68909b63c873a40469caf013dc
  Author: Greg Kurz <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ppc/spapr_pci.c

  Log Message:
  -----------
  spapr_pci: make index property mandatory

PHBs can be created with an index property, in which case the machine
code automatically sets all the MMIO windows at addresses derived from
the index. Alternatively, they can be manually created without index,
but the user has to provide addresses for all MMIO windows.

The non-index way happens to be more trouble than it's worth: it's
difficult to use, keeps requiring (potentially incompatible) changes
when some new parameter needs adding, and is awkward to check for
collisions. It currently even has a bug that prevents to use two
non-index PHBs because their child DRCs are all derived from the
same index == -1 value, and, thus, collide.

This patch hence makes the index property mandatory. As a consequence,
the PHB's memory regions and BUID are now always configured according
to the index, and it is no longer possible to set them from the command
line.

This DOES BREAK backwards compat, but we don't think the non-index
PHB feature was used in practice (at least libvirt doesn't) and the
simplification is worth it.

Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 53a04e8e791525067c3cd3f28ebb9ab85bed4be2
      
https://github.com/qemu/qemu/commit/53a04e8e791525067c3cd3f28ebb9ab85bed4be2
  Author: John Snow <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M target/ppc/cpu-models.h

  Log Message:
  -----------
  ppc: remove unused CPU definitions

Following commit aef77960, remove now-unused definitions from
cpu-models.h.

Signed-off-by: John Snow <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 5aec066c416bf8b2d977d2081d0a7540dda3b96f
      
https://github.com/qemu/qemu/commit/5aec066c416bf8b2d977d2081d0a7540dda3b96f
  Author: John Snow <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M target/ppc/cpu-models.h

  Log Message:
  -----------
  ppc: remove all unused CPU definitions

Remove *all* unused CPU definitions as indicated by compile-time
`#if 0` constructs.

Signed-off-by: John Snow <address@hidden>
[dwg: Removed some additional now-useless comments]
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 15fcedb26fce9cde3f3a2cec533101b6fe43f6e5
      
https://github.com/qemu/qemu/commit/15fcedb26fce9cde3f3a2cec533101b6fe43f6e5
  Author: Cédric Le Goater <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ppc/pnv.c

  Log Message:
  -----------
  ppc/pnv: check for OPAL firmware file presence

and exit before uselessly trying to load it if the file does not
exists.

Issue discovered by Coverity Scan.

Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 1ec26c757d5996468afcc0dced4fad04139574b3
      
https://github.com/qemu/qemu/commit/1ec26c757d5996468afcc0dced4fad04139574b3
  Author: Greg Kurz <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ppc/spapr.c
    M hw/ppc/spapr_cpu_core.c
    M hw/ppc/spapr_hcall.c
    M target/ppc/cpu.h
    M target/ppc/kvm.c
    M target/ppc/kvm_ppc.h

  Log Message:
  -----------
  spapr: fix the value of SDR1 in kvmppc_put_books_sregs()

When running with KVM PR, if a new HPT is allocated we need to inform
KVM about the HPT address and size. This is currently done by hacking
the value of SDR1 and pushing it to KVM in several places.

Also, migration breaks the guest since it is very unlikely the HPT has
the same address in source and destination, but we push the incoming
value of SDR1 to KVM anyway.

This patch introduces a new virtual hypervisor hook so that the spapr
code can provide the correct value of SDR1 to be pushed to KVM each
time kvmppc_put_books_sregs() is called.

It allows to get rid of all the hacking in the spapr/kvmppc code and
it fixes migration of nested KVM PR.

Suggested-by: David Gibson <address@hidden>
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 2bb4a98f905db2d010f42ddd23db3a6d5d7d18c9
      
https://github.com/qemu/qemu/commit/2bb4a98f905db2d010f42ddd23db3a6d5d7d18c9
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/misc/macio/mac_dbdma.c
    M include/hw/ppc/mac_dbdma.h

  Log Message:
  -----------
  mac_dbdma: remove unused IO fields from DBDMAState

These fields were used to manually handle IO requests that weren't aligned
to a sector boundary before this feature was supported by the block API.

Once the block API changed to support byte-aligned IO requests, the macio
controller was switched over to use it in commit be1e343 but these fields
were accidentally left behind. Remove them, including the initialisation
in DBDMA_init().

Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 1d27f351af962f5f7db91d7b967984e575fc63c1
      
https://github.com/qemu/qemu/commit/1d27f351af962f5f7db91d7b967984e575fc63c1
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/misc/macio/mac_dbdma.c
    M include/hw/ppc/mac_dbdma.h

  Log Message:
  -----------
  mac_dbdma: QOMify

Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: ecba28dbf2f832e82ef016b8e57c9da0a3023bfd
      
https://github.com/qemu/qemu/commit/ecba28dbf2f832e82ef016b8e57c9da0a3023bfd
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/misc/macio/mac_dbdma.c
    M hw/misc/macio/macio.c
    M include/hw/ppc/mac_dbdma.h

  Log Message:
  -----------
  mac_dbdma: remove DBDMA_init() function

Instead we can now instantiate the MAC_DBDMA object directly within the
macio device. We also add the DBDMA device as a child property so that
it is possible to retrieve later.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 0fc84331d631ea434fb846f4916f216aeb5b5f91
      
https://github.com/qemu/qemu/commit/0fc84331d631ea434fb846f4916f216aeb5b5f91
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ide/macio.c
    M hw/misc/macio/macio.c
    M hw/ppc/mac.h

  Log Message:
  -----------
  macio: pass channel into MACIOIDEState via qdev property

One of the reasons macio_ide_register_dma() needs to exist is because the
channel id isn't passed into the MACIO_IDE object. Pass in the channel id
using a qdev property to remove this requirement.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: e451b85f1bf3c8140be51e2b03eb71ab96c246a5
      
https://github.com/qemu/qemu/commit/e451b85f1bf3c8140be51e2b03eb71ab96c246a5
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ide/macio.c
    M hw/misc/macio/macio.c
    M hw/ppc/mac.h

  Log Message:
  -----------
  macio: use object link between MACIO_IDE and MAC_DBDMA object

Using a standard QOM object link we can pass a reference to the MAC_DBDMA
controller to the MACIO_IDE object which removes the last external parameter
to macio_ide_register_dma().

Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 1d8934408135ac03b1c753c3b0a819cf7f387d60
      
https://github.com/qemu/qemu/commit/1d8934408135ac03b1c753c3b0a819cf7f387d60
  Author: Peter Maydell <address@hidden>
  Date:   2017-09-27 (Wed, 27 Sep 2017)

  Changed paths:
    M hw/ide/macio.c
    M hw/intc/openpic.c
    M hw/misc/macio/mac_dbdma.c
    M hw/misc/macio/macio.c
    M hw/ppc/mac.h
    M hw/ppc/mac_newworld.c
    M hw/ppc/mac_oldworld.c
    M hw/ppc/pnv.c
    M hw/ppc/ppc405_uc.c
    M hw/ppc/spapr.c
    M hw/ppc/spapr_cpu_core.c
    M hw/ppc/spapr_hcall.c
    M hw/ppc/spapr_pci.c
    M hw/usb/hcd-ehci-sysbus.c
    M hw/usb/hcd-ehci.h
    M hw/usb/hcd-ohci.c
    M include/hw/ppc/mac_dbdma.h
    M include/hw/ppc/openpic.h
    M include/hw/ppc/pnv_xscom.h
    M target/ppc/cpu-models.c
    M target/ppc/cpu-models.h
    M target/ppc/cpu.h
    M target/ppc/kvm.c
    M target/ppc/kvm_ppc.h
    M target/ppc/translate_init.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.11-20170927' 
into staging

ppc patch queue 2017-09-27

Contains
 * a number of Mac machine type fixes
 * a number of embedded machine type fixes (preliminary to adding the
   Sam460ex board)
 * a important fix for handling of migration with KVM PR
 * assorted other minor fixes and cleanups

# gpg: Signature made Wed 27 Sep 2017 08:40:48 BST
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <address@hidden>"
# gpg:                 aka "David Gibson (Red Hat) <address@hidden>"
# gpg:                 aka "David Gibson (ozlabs.org) <address@hidden>"
# gpg:                 aka "David Gibson (kernel.org) <address@hidden>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.11-20170927: (26 commits)
  macio: use object link between MACIO_IDE and MAC_DBDMA object
  macio: pass channel into MACIOIDEState via qdev property
  mac_dbdma: remove DBDMA_init() function
  mac_dbdma: QOMify
  mac_dbdma: remove unused IO fields from DBDMAState
  spapr: fix the value of SDR1 in kvmppc_put_books_sregs()
  ppc/pnv: check for OPAL firmware file presence
  ppc: remove all unused CPU definitions
  ppc: remove unused CPU definitions
  spapr_pci: make index property mandatory
  macio: convert pmac_ide_ops from old_mmio
  ppc/pnv: Improve macro parenthesization
  spapr: introduce helpers to migrate HPT chunks and the end marker
  ppc/kvm: generalize the use of kvmppc_get_htab_fd()
  ppc/kvm: change kvmppc_get_htab_fd() to return -errno on error
  ppc: Fix OpenPIC model
  ppc/ide/macio: Add missing registers
  ppc/mac: More rework of the DBDMA emulation
  ppc/mac: Advertise a high clock frequency for NewWorld Macs
  ppc: QOMify g3beige machine
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/cfe4cade054c...1d8934408135

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