qemu-commits
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] 8b3d26: xio3130_downstream: Report error if p


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 8b3d26: xio3130_downstream: Report error if pcie_chassis_a...
Date: Mon, 16 Oct 2017 10:10:14 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 8b3d26342c4aa171e759e6392fe3b742759d4963
      
https://github.com/qemu/qemu/commit/8b3d26342c4aa171e759e6392fe3b742759d4963
  Author: Eduardo Habkost <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/pci-bridge/xio3130_downstream.c

  Log Message:
  -----------
  xio3130_downstream: Report error if pcie_chassis_add_slot() failed

On commit f8cd1b02 ("pci: Convert to realize"), no error_set*()
call was added for the pcie_chassis_add_slot() error case.
pcie_chassis_add_slot() errors get ignored, making QEMU crash
later.  e.g.:

  $ qemu-system-x86_64 -device ioh3420 -device xio3130-downstream
  qemu-system-x86_64: memory.c:2166: memory_region_del_subregion: Assertion 
`subregion->container == mr' failed.
  Aborted (core dumped)

Fix it by reporting the error using error_setg().

Fixes: f8cd1b0201c41d88bb97dcafb80348a0e88d8805
Signed-off-by: Eduardo Habkost <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 06592d7e28794dcd93dbd5186910ba8c987453ba
      
https://github.com/qemu/qemu/commit/06592d7e28794dcd93dbd5186910ba8c987453ba
  Author: Mao Zhongyi <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/pci-bridge/ioh3420.c

  Log Message:
  -----------
  pci: Set err to errp directly rather than through error_propagate()

ioh3420_interrupts_init() pass error message to local_err, then
propagate it to errp by error_propagate(), which is not necessary.
So eliminate it and pass errp directly instead of local_err.

Cc: "Michael S. Tsirkin" <address@hidden>
Cc: Marcel Apfelbaum <address@hidden>
Signed-off-by: Mao Zhongyi <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 5f9252f7cc12c5cec1b3c6695aca02eb52ea7acc
      
https://github.com/qemu/qemu/commit/5f9252f7cc12c5cec1b3c6695aca02eb52ea7acc
  Author: Marc-André Lureau <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/acpi/vmgenid.c
    M hw/core/loader.c
    M hw/i386/acpi-build.c
    M hw/isa/lpc_ich9.c
    M hw/nvram/fw_cfg.c
    M include/hw/nvram/fw_cfg.h

  Log Message:
  -----------
  fw_cfg: add write callback

Reintroduce the write callback that was removed when write support was
removed in commit 023e3148567ac898c7258138f8e86c3c2bb40d07.

Contrary to the previous callback implementation, the write_cb
callback is called whenever a write happened, so handlers must be
ready to handle partial write as necessary.

Signed-off-by: Marc-André Lureau <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 6e43353f10c6688060af0bc26bdfdd4cf9c96ea2
      
https://github.com/qemu/qemu/commit/6e43353f10c6688060af0bc26bdfdd4cf9c96ea2
  Author: Marc-André Lureau <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    A docs/specs/vmcoreinfo.txt
    M hw/misc/Makefile.objs
    A hw/misc/vmcoreinfo.c
    A include/hw/misc/vmcoreinfo.h

  Log Message:
  -----------
  hw/misc: add vmcoreinfo device

See docs/specs/vmcoreinfo.txt for details.

"etc/vmcoreinfo" fw_cfg entry is added when using "-device vmcoreinfo".

Signed-off-by: Marc-André Lureau <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 903ef7349699dcd932b5981b85c1f1ebe4a4bf2a
      
https://github.com/qemu/qemu/commit/903ef7349699dcd932b5981b85c1f1ebe4a4bf2a
  Author: Marc-André Lureau <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M dump.c
    M include/sysemu/dump.h

  Log Message:
  -----------
  dump: add guest ELF note

Read the guest ELF PT_NOTE from guest memory when fw_cfg
etc/vmcoreinfo entry provides the location, and write it as an
additional note in the dump.

Signed-off-by: Marc-André Lureau <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: d9feb51772b4ade9700c7fa54529327a6c8183a7
      
https://github.com/qemu/qemu/commit/d9feb51772b4ade9700c7fa54529327a6c8183a7
  Author: Marc-André Lureau <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M docs/specs/vmcoreinfo.txt
    M dump.c

  Log Message:
  -----------
  dump: update phys_base header field based on VMCOREINFO content

If the guest note is VMCOREINFO, try to get phys_base from it.

Signed-off-by: Marc-André Lureau <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 9ada575bbafaf6d3724a7f59df9da89776817cac
      
https://github.com/qemu/qemu/commit/9ada575bbafaf6d3724a7f59df9da89776817cac
  Author: Marc-André Lureau <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M dump.c

  Log Message:
  -----------
  kdump: set vmcoreinfo location

kdump header provides offset and size of the vmcoreinfo content,
append it if available (skip the ELF note header).

crash-7.1.9 was the first version that started looking in the
vmcoreinfo data for phys_base instead of in the kdump_sub_header.

Signed-off-by: Marc-André Lureau <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: d23bfa91b7789534d16ede6cb7d925bfac3f3c4c
      
https://github.com/qemu/qemu/commit/d23bfa91b7789534d16ede6cb7d925bfac3f3c4c
  Author: Marc-André Lureau <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M scripts/dump-guest-memory.py

  Log Message:
  -----------
  scripts/dump-guest-memory.py: add vmcoreinfo

Add a vmcoreinfo ELF note in the dump if vmcoreinfo device has the
memory location details.

Signed-off-by: Marc-André Lureau <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 3505a22bcb6a220545894264b3dacbb164a0669b
      
https://github.com/qemu/qemu/commit/3505a22bcb6a220545894264b3dacbb164a0669b
  Author: Marc-André Lureau <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M MAINTAINERS

  Log Message:
  -----------
  MAINTAINERS: add Dump maintainers

Proposing myself, since I have some familiarity with the code now.

Signed-off-by: Marc-André Lureau <address@hidden>
Acked-by: Laszlo Ersek <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 5c0ba1be37181bd8a7c96c7f81b19ae5f8e66e2d
      
https://github.com/qemu/qemu/commit/5c0ba1be37181bd8a7c96c7f81b19ae5f8e66e2d
  Author: Felipe Franciosi <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/virtio/vhost.c

  Log Message:
  -----------
  virtio/vhost: reset dev->log after syncing

vhost_log_put() is called to decomission the dirty log between qemu and
a vhost device when stopping the device. Such a call can happen from
migration_completion().

Present code sets dev->log_size to zero too early in vhost_log_put(),
causing the sync check to always return false. As a consequence, the
last pass on the dirty bitmap never happens at the end of migration.

If a vhost device was busy (writing to guest memory) until the last
moments before vhost_virtqueue_stop(), this error will result in guest
memory corruption (at least) following migrations.

Signed-off-by: Felipe Franciosi <address@hidden>
Acked-by: Jason Wang <address@hidden>
Reviewed-by: Marc-André Lureau <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 9cd1e97a7ae2856ec00b5682db0dea17f42fc734
      
https://github.com/qemu/qemu/commit/9cd1e97a7ae2856ec00b5682db0dea17f42fc734
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/pci/pci_bridge.c

  Log Message:
  -----------
  pci: allow 32-bit PCI IO accesses to pass through the PCI bridge

Whilst the underlying PCI bridge implementation supports 32-bit PCI IO
accesses, unfortunately they are truncated at the legacy 64K limit.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: d659d94013390238961fac741572306c95496bf5
      
https://github.com/qemu/qemu/commit/d659d94013390238961fac741572306c95496bf5
  Author: Aleksandr Bezzubikov <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/pci-bridge/pcie_pci_bridge.c

  Log Message:
  -----------
  hw/pci-bridge/pcie_pci_bridge: properly handle MSI unavailability case

QEMU with the pcie-pci-bridge device crashes if the guest board doesn't support 
MSI,
e.g. 'qemu-system-ppc64 -M prep -device pcie-pci-bridge'.
This is caused by wrong pcie-pci-bridge instantiation error handling. This 
patch fixes this issue
by falling back to legacy INTx if MSI is not available.
Also set the bridge's 'msi' property default value to 'auto' in order to 
trigger errors
only when user explicitly set msi=on.

Reported-by: Eduardo Habkost <address@hidden>
Signed-off-by: Aleksandr Bezzubikov <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Tested-by: Thomas Huth <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: b81b948ecc8659d78066f374c787ed12379d21dd
      
https://github.com/qemu/qemu/commit/b81b948ecc8659d78066f374c787ed12379d21dd
  Author: Dr. David Alan Gilbert <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/virtio/virtio-pci.c

  Log Message:
  -----------
  virtio/pci/migration: Convert to VMState

Convert the 'modern_state' part of virtio-pci to modern migration
macros.

Signed-off-by: Dr. David Alan Gilbert <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: a6c242aaf52409ea827665e6f5f84b446d17a859
      
https://github.com/qemu/qemu/commit/a6c242aaf52409ea827665e6f5f84b446d17a859
  Author: Matt Redfearn <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/pci/pcie_host.c

  Log Message:
  -----------
  PCI: PCIe access should always be little endian

PCIe busses are always little endian, so set the endianness of the
memory region to little endian rather than native such that operations
work as expected on big endian targets.

Signed-off-by: Matt Redfearn <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 619f02aefc587e5e2821cd84b584eba199c97c9e
      
https://github.com/qemu/qemu/commit/619f02aefc587e5e2821cd84b584eba199c97c9e
  Author: Eduardo Habkost <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/pci/pci.c
    M include/hw/pci/pci.h

  Log Message:
  -----------
  pci: conventional-pci-device and pci-express-device interfaces

Those two interfaces will be used to indicate which device types
support Conventional PCI or PCI Express buses.  Management
software will be able to use the qom-list-types QMP command to
query that information.

Signed-off-by: Eduardo Habkost <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: a5fa336f11a1eddad9f2be6506e59ba50ed81818
      
https://github.com/qemu/qemu/commit/a5fa336f11a1eddad9f2be6506e59ba50ed81818
  Author: Eduardo Habkost <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/net/vmxnet3.c
    M hw/scsi/vmw_pvscsi.c
    M hw/usb/hcd-xhci.c
    M hw/vfio/pci.c
    M hw/virtio/virtio-pci.c

  Log Message:
  -----------
  pci: Add interface names to hybrid PCI devices

The following devices support both PCI Express and Conventional
PCI, by including special code to handle the QEMU_PCI_CAP_EXPRESS
flag and/or conditional pcie_endpoint_cap_init() calls:

* vfio-pci (is_express=1, but legacy PCI handled by
  vfio_populate_device())
* vmxnet3 (is_express=0, but PCIe handled by vmxnet3_realize())
* pvscsi (is_express=0, but PCIe handled by pvscsi_realize())
* virtio-pci (is_express=0, but PCIe handled by
  virtio_pci_dc_realize(), and additional legacy PCI code at
  virtio_pci_realize())
* base-xhci (is_express=1, but pcie_endpoint_cap_init() call
  is conditional on pci_bus_is_express(dev->bus)
  * Note that xhci does not clear QEMU_PCI_CAP_EXPRESS like the
    other hybrid devices

Cc: Dmitry Fleytman <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Cc: Gerd Hoffmann <address@hidden>
Cc: Alex Williamson <address@hidden>
Cc: "Michael S. Tsirkin" <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 71d787677d0cacea846dc851c3e56ad076d59c04
      
https://github.com/qemu/qemu/commit/71d787677d0cacea846dc851c3e56ad076d59c04
  Author: Eduardo Habkost <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/block/nvme.c
    M hw/net/e1000e.c
    M hw/pci-bridge/pcie_pci_bridge.c
    M hw/pci-bridge/pcie_root_port.c
    M hw/pci-bridge/xio3130_downstream.c
    M hw/pci-bridge/xio3130_upstream.c
    M hw/pci-host/xilinx-pcie.c
    M hw/scsi/megasas.c

  Log Message:
  -----------
  pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices

Change all devices that set is_express=1 to implement
INTERFACE_PCIE_DEVICE.

Cc: Keith Busch <address@hidden>
Cc: Kevin Wolf <address@hidden>
Cc: Max Reitz <address@hidden>
Cc: Dmitry Fleytman <address@hidden>
Cc: Jason Wang <address@hidden>
Cc: "Michael S. Tsirkin" <address@hidden>
Cc: Marcel Apfelbaum <address@hidden>
Cc: Paul Burton <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Cc: Hannes Reinecke <address@hidden>
Cc: address@hidden
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: fd3b02c8896d597dd8b9e053dec579cf0386aee1
      
https://github.com/qemu/qemu/commit/fd3b02c8896d597dd8b9e053dec579cf0386aee1
  Author: Eduardo Habkost <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/acpi/piix4.c
    M hw/audio/ac97.c
    M hw/audio/es1370.c
    M hw/audio/intel-hda.c
    M hw/char/serial-pci.c
    M hw/display/cirrus_vga.c
    M hw/display/qxl.c
    M hw/display/sm501.c
    M hw/display/vga-pci.c
    M hw/display/vmware_vga.c
    M hw/i2c/smbus_ich9.c
    M hw/i386/amd_iommu.c
    M hw/i386/kvm/pci-assign.c
    M hw/i386/pc_piix.c
    M hw/i386/xen/xen_platform.c
    M hw/i386/xen/xen_pvdevice.c
    M hw/ide/ich.c
    M hw/ide/pci.c
    M hw/ipack/tpci200.c
    M hw/isa/i82378.c
    M hw/isa/lpc_ich9.c
    M hw/isa/piix4.c
    M hw/isa/vt82c686.c
    M hw/mips/gt64xxx_pci.c
    M hw/misc/edu.c
    M hw/misc/ivshmem.c
    M hw/misc/macio/macio.c
    M hw/misc/pci-testdev.c
    M hw/net/e1000.c
    M hw/net/eepro100.c
    M hw/net/ne2000.c
    M hw/net/pcnet-pci.c
    M hw/net/rocker/rocker.c
    M hw/net/rtl8139.c
    M hw/net/sungem.c
    M hw/net/sunhme.c
    M hw/pci-bridge/dec.c
    M hw/pci-bridge/i82801b11.c
    M hw/pci-bridge/pci_bridge_dev.c
    M hw/pci-bridge/pci_expander_bridge.c
    M hw/pci-host/apb.c
    M hw/pci-host/bonito.c
    M hw/pci-host/gpex.c
    M hw/pci-host/grackle.c
    M hw/pci-host/piix.c
    M hw/pci-host/ppce500.c
    M hw/pci-host/prep.c
    M hw/pci-host/q35.c
    M hw/pci-host/uninorth.c
    M hw/pci-host/versatile.c
    M hw/ppc/ppc4xx_pci.c
    M hw/scsi/esp-pci.c
    M hw/scsi/lsi53c895a.c
    M hw/scsi/megasas.c
    M hw/scsi/mptsas.c
    M hw/sd/sdhci.c
    M hw/sh4/sh_pci.c
    M hw/sparc64/sun4u.c
    M hw/usb/hcd-ehci-pci.c
    M hw/usb/hcd-ohci.c
    M hw/usb/hcd-uhci.c
    M hw/vfio/pci-quirks.c
    M hw/watchdog/wdt_i6300esb.c
    M hw/xen/xen_pt.c

  Log Message:
  -----------
  pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices

Add INTERFACE_CONVENTIONAL_PCI_DEVICE to all direct subtypes of
TYPE_PCI_DEVICE, except:

1) The ones that already have INTERFACE_PCIE_DEVICE set:

* base-xhci
* e1000e
* nvme
* pvscsi
* vfio-pci
* virtio-pci
* vmxnet3

2) base-pci-bridge

Not all PCI bridges are Conventional PCI devices, so
INTERFACE_CONVENTIONAL_PCI_DEVICE is added only to the subtypes
that are actually Conventional PCI:

* dec-21154-p2p-bridge
* i82801b11-bridge
* pbm-bridge
* pci-bridge

The direct subtypes of base-pci-bridge not touched by this patch
are:

* xilinx-pcie-root: Already marked as PCIe-only.
* pcie-pci-bridge: Already marked as PCIe-only.
* pcie-port: all non-abstract subtypes of pcie-port are already
  marked as PCIe-only devices.

3) megasas-base

Not all megasas devices are Conventional PCI devices, so the
interface names are added to the subclasses registered by
megasas_register_types(), according to information in the
megasas_devices[] array.

"megasas-gen2" already implements INTERFACE_PCIE_DEVICE, so add
INTERFACE_CONVENTIONAL_PCI_DEVICE only to "megasas".

Acked-by: Alberto Garcia <address@hidden>
Acked-by: John Snow <address@hidden>
Acked-by: Anthony PERARD <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Acked-by: David Gibson <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 6d7023763ec8cc7999468769a0c6bf1335dc3bf4
      
https://github.com/qemu/qemu/commit/6d7023763ec8cc7999468769a0c6bf1335dc3bf4
  Author: Eduardo Habkost <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/xen/xen_pt.c

  Log Message:
  -----------
  xen/pt: Mark TYPE_XEN_PT_DEVICE as hybrid

xen-pt doesn't set the is_express field, but is supposed to be
able to handle PCI Express devices too.  Mark it as hybrid.

Suggested-by: Jan Beulich <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 2fefa16cec5a719f5cbc26c0672dd2099cd2ed9b
      
https://github.com/qemu/qemu/commit/2fefa16cec5a719f5cbc26c0672dd2099cd2ed9b
  Author: Eduardo Habkost <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/pci/pci.c

  Log Message:
  -----------
  pci: Validate interfaces on base_class_init

Make sure we don't forget to add the Conventional PCI or PCI
Express interface names on PCI device classes in the future.

Signed-off-by: Eduardo Habkost <address@hidden>
Revieed-by: David Gibson <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 8e36c336d943c3bfe0d06f5465cc64d44b306e13
      
https://github.com/qemu/qemu/commit/8e36c336d943c3bfe0d06f5465cc64d44b306e13
  Author: Marcel Apfelbaum <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/pci-bridge/gen_pcie_root_port.c

  Log Message:
  -----------
  hw/gen_pcie_root_port: make IO RO 0 on IO disabled

IO_LIMIT and IO_BASE registers should not be writable if
gen_pcie_root_port's io-reserve property is set to 0.
The COMMAND register should have the IO flag read only.

Signed-off-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 37ef70be6af7e9f2a6f852c68f74bd98dac2664b
      
https://github.com/qemu/qemu/commit/37ef70be6af7e9f2a6f852c68f74bd98dac2664b
  Author: Wolfgang Bumiller <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/virtio/virtio.c

  Log Message:
  -----------
  virtio: fix descriptor counting in virtqueue_pop

While changing the s/g list allocation, commit 3b3b0628
also changed the descriptor counting to count iovec entries
as split by cpu_physical_memory_map(). Previously only the
actual descriptor entries were counted and the split into
the iovec happened afterwards in virtqueue_map().
Count the entries again instead to avoid erroneous
"Looped descriptor" errors.

Reported-by: Hans Middelhoek <address@hidden>
Link: https://forum.proxmox.com/threads/vm-crash-with-memory-hotplug.35904/
Fixes: 3b3b0628217e ("virtio: slim down allocation of VirtQueueElements")
Signed-off-by: Wolfgang Bumiller <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: a93c8d828af186d9a6a1c915a1be8ba22fb89849
      
https://github.com/qemu/qemu/commit/a93c8d828af186d9a6a1c915a1be8ba22fb89849
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/virtio/virtio-pci.c
    M hw/virtio/virtio-pci.h

  Log Message:
  -----------
  virtio-pci: Replace modern_as with direct access to modern_bar

The modern bar is accessed now via yet another address space created just
for that purpose and it does not really need FlatView and dispatch tree
as it has a single memory region so it is just a waste of memory. Things
get even worse when there are dozens or hundreds of virtio-pci devices -
since these address spaces are global, changing any of them triggers
rebuilding all address spaces.

This replaces indirect accesses to the modern BAR with a simple lookup
and direct calls to memory_region_dispatch_read/write.

This is expected to save lots of memory at boot time after applying:
[Qemu-devel] [PULL 00/32] Misc changes for 2017-09-22

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: b5dac424922d62467ec2fd5bbe3a37b8d51919f3
      
https://github.com/qemu/qemu/commit/b5dac424922d62467ec2fd5bbe3a37b8d51919f3
  Author: Eduardo Habkost <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/i386/pc_piix.c

  Log Message:
  -----------
  isapc: Remove unnecessary migration compatibility code

We don't touch isapc when we change guest ABI and add new entries
to PC_COMPAT_* or new PCMachineClass compat flags.  This means
isapc never guaranteed guest ABI and cross-QEMU-version live
migration compatibility.  There's no point in keeping code for
kvm-pv-eoi and APIC ID compatibility in pc_init_isa().

Signed-off-by: Eduardo Habkost <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 46202d85d75b3a57c322f4832aac1dd20d5b3233
      
https://github.com/qemu/qemu/commit/46202d85d75b3a57c322f4832aac1dd20d5b3233
  Author: Laurent Vivier <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c

  Log Message:
  -----------
  pc: remove useless hot_add_cpu initialisation

Since 4458fb3a79 (pc: Eliminate pc_default_machine_options()),
hot_add_cpu is set in pc_machine_class_init(), so we don't
need to set it in pc_q35_machine_options(), pc_i440fx_machine_options()
and xenfv_machine_options(), except to clear it in
pc_i440fx_1_4_machine_opt().

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Acked-by: Anthony PERARD <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: ab06ec43577177a442e8e5ca28d0154efe4ff60f
      
https://github.com/qemu/qemu/commit/ab06ec43577177a442e8e5ca28d0154efe4ff60f
  Author: Thomas Huth <address@hidden>
  Date:   2017-10-15 (Sun, 15 Oct 2017)

  Changed paths:
    M tests/pxe-test.c

  Log Message:
  -----------
  tests/pxe: Test more NICs when running in SPEED=slow mode

The pxe-test is a very good test to excercise NICs, thus we should use
it to test all NICs that can be used by the BIOS for booting via network.
However, to avoid that the default testing time increases too much, the
additional NICs are only tested in the "make check SPEED=slow" mode.

The virtio-net NIC on ppc64 is now also only tested in slow mode, since
the test on ppc64 is really quite slow and we've got test coverage for
virtio-net in big endian mode now on s390x, too.

Signed-off-by: Thomas Huth <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: c5bbcaa4b7c0f8a322bebe9ec563560178a68b55
      
https://github.com/qemu/qemu/commit/c5bbcaa4b7c0f8a322bebe9ec563560178a68b55
  Author: Peter Maydell <address@hidden>
  Date:   2017-10-16 (Mon, 16 Oct 2017)

  Changed paths:
    M MAINTAINERS
    A docs/specs/vmcoreinfo.txt
    M dump.c
    M hw/acpi/piix4.c
    M hw/acpi/vmgenid.c
    M hw/audio/ac97.c
    M hw/audio/es1370.c
    M hw/audio/intel-hda.c
    M hw/block/nvme.c
    M hw/char/serial-pci.c
    M hw/core/loader.c
    M hw/display/cirrus_vga.c
    M hw/display/qxl.c
    M hw/display/sm501.c
    M hw/display/vga-pci.c
    M hw/display/vmware_vga.c
    M hw/i2c/smbus_ich9.c
    M hw/i386/acpi-build.c
    M hw/i386/amd_iommu.c
    M hw/i386/kvm/pci-assign.c
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M hw/i386/xen/xen_platform.c
    M hw/i386/xen/xen_pvdevice.c
    M hw/ide/ich.c
    M hw/ide/pci.c
    M hw/ipack/tpci200.c
    M hw/isa/i82378.c
    M hw/isa/lpc_ich9.c
    M hw/isa/piix4.c
    M hw/isa/vt82c686.c
    M hw/mips/gt64xxx_pci.c
    M hw/misc/Makefile.objs
    M hw/misc/edu.c
    M hw/misc/ivshmem.c
    M hw/misc/macio/macio.c
    M hw/misc/pci-testdev.c
    A hw/misc/vmcoreinfo.c
    M hw/net/e1000.c
    M hw/net/e1000e.c
    M hw/net/eepro100.c
    M hw/net/ne2000.c
    M hw/net/pcnet-pci.c
    M hw/net/rocker/rocker.c
    M hw/net/rtl8139.c
    M hw/net/sungem.c
    M hw/net/sunhme.c
    M hw/net/vmxnet3.c
    M hw/nvram/fw_cfg.c
    M hw/pci-bridge/dec.c
    M hw/pci-bridge/gen_pcie_root_port.c
    M hw/pci-bridge/i82801b11.c
    M hw/pci-bridge/ioh3420.c
    M hw/pci-bridge/pci_bridge_dev.c
    M hw/pci-bridge/pci_expander_bridge.c
    M hw/pci-bridge/pcie_pci_bridge.c
    M hw/pci-bridge/pcie_root_port.c
    M hw/pci-bridge/xio3130_downstream.c
    M hw/pci-bridge/xio3130_upstream.c
    M hw/pci-host/apb.c
    M hw/pci-host/bonito.c
    M hw/pci-host/gpex.c
    M hw/pci-host/grackle.c
    M hw/pci-host/piix.c
    M hw/pci-host/ppce500.c
    M hw/pci-host/prep.c
    M hw/pci-host/q35.c
    M hw/pci-host/uninorth.c
    M hw/pci-host/versatile.c
    M hw/pci-host/xilinx-pcie.c
    M hw/pci/pci.c
    M hw/pci/pci_bridge.c
    M hw/pci/pcie_host.c
    M hw/ppc/ppc4xx_pci.c
    M hw/scsi/esp-pci.c
    M hw/scsi/lsi53c895a.c
    M hw/scsi/megasas.c
    M hw/scsi/mptsas.c
    M hw/scsi/vmw_pvscsi.c
    M hw/sd/sdhci.c
    M hw/sh4/sh_pci.c
    M hw/sparc64/sun4u.c
    M hw/usb/hcd-ehci-pci.c
    M hw/usb/hcd-ohci.c
    M hw/usb/hcd-uhci.c
    M hw/usb/hcd-xhci.c
    M hw/vfio/pci-quirks.c
    M hw/vfio/pci.c
    M hw/virtio/vhost.c
    M hw/virtio/virtio-pci.c
    M hw/virtio/virtio-pci.h
    M hw/virtio/virtio.c
    M hw/watchdog/wdt_i6300esb.c
    M hw/xen/xen_pt.c
    A include/hw/misc/vmcoreinfo.h
    M include/hw/nvram/fw_cfg.h
    M include/hw/pci/pci.h
    M include/sysemu/dump.h
    M scripts/dump-guest-memory.py
    M tests/pxe-test.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

pc, pci, virtio: fixes, features

A bunch of fixes all over the place.
A new vmcore device - the user interface around it is still somewhat
controversial, but I feel most of the code is fine, suggestions can be
addressed by adding patches on top.

Signed-off-by: Michael S. Tsirkin <address@hidden>

# gpg: Signature made Sun 15 Oct 2017 04:02:23 BST
# gpg:                using RSA key 0x281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <address@hidden>"
# gpg:                 aka "Michael S. Tsirkin <address@hidden>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream: (26 commits)
  tests/pxe: Test more NICs when running in SPEED=slow mode
  pc: remove useless hot_add_cpu initialisation
  isapc: Remove unnecessary migration compatibility code
  virtio-pci: Replace modern_as with direct access to modern_bar
  virtio: fix descriptor counting in virtqueue_pop
  hw/gen_pcie_root_port: make IO RO 0 on IO disabled
  pci: Validate interfaces on base_class_init
  xen/pt: Mark TYPE_XEN_PT_DEVICE as hybrid
  pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
  pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices
  pci: Add interface names to hybrid PCI devices
  pci: conventional-pci-device and pci-express-device interfaces
  PCI: PCIe access should always be little endian
  virtio/pci/migration: Convert to VMState
  hw/pci-bridge/pcie_pci_bridge: properly handle MSI unavailability case
  pci: allow 32-bit PCI IO accesses to pass through the PCI bridge
  virtio/vhost: reset dev->log after syncing
  MAINTAINERS: add Dump maintainers
  scripts/dump-guest-memory.py: add vmcoreinfo
  kdump: set vmcoreinfo location
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/79b2a13aa817...c5bbcaa4b7c0

reply via email to

[Prev in Thread] Current Thread [Next in Thread]