[Qemu-commits] [qemu/qemu] fa7c0c: target/mips: Add preprocessor constants for nanoMI...

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: fa7c0c9f5bc12970858a89f46dd5012c01545b80
      
https://github.com/qemu/qemu/commit/fa7c0c9f5bc12970858a89f46dd5012c01545b80
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/mips-defs.h

  Log Message:
  -----------
  target/mips: Add preprocessor constants for nanoMIPS

Add ISA_NANOMIPS32 and CPU_NANOMIPS32 preprocessor constants.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 261c95a0e98e5e9b13c9c005a991b7e7dc27f38a
      
https://github.com/qemu/qemu/commit/261c95a0e98e5e9b13c9c005a991b7e7dc27f38a
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add nanoMIPS base instruction set opcodes

Add nanoMIPS opcodes. nanoMIPS instruction are organized by so-called
instruction pools. Each pool contains a set of opcodes, that in turn
can be instruction opcodes or instruction pool opcodes.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: b3979b6fc3faf286968a239d09c7adf36d0fade6
      
https://github.com/qemu/qemu/commit/b3979b6fc3faf286968a239d09c7adf36d0fade6
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add nanoMIPS DSP ASE opcodes

Add nanoMIPS opcodes for DSP ASE instruction pools and instructions.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 0bbc0396809f6caaaf96863dafe738e94f9b73ea
      
https://github.com/qemu/qemu/commit/0bbc0396809f6caaaf96863dafe738e94f9b73ea
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Prevent switching mode related to Config3 ISA bit for nanoMIPS

Only if Config3.ISA is 3 (microMIPS), the mode should be switched in
cpu_state_reset(). Config3.ISA is 1 for nanoMIPS processors, and no mode
change should happen.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>


  Commit: c533c0f4741be62501ef6c7f6ce77ffbfc2e4964
      
https://github.com/qemu/qemu/commit/c533c0f4741be62501ef6c7f6ce77ffbfc2e4964
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add placeholder and invocation of decode_nanomips_opc()

Add empty body and invocation of decode_nanomips_opc() if the bit
ISA_NANOMIPS32 is set in ctx->insn_flags.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 6bfa9f4c9cf24d6cfaaa227722e9cdcca1ad6fe9
      
https://github.com/qemu/qemu/commit/6bfa9f4c9cf24d6cfaaa227722e9cdcca1ad6fe9
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add nanoMIPS decoding and extraction utilities

Add some basic utility functions and macros for nanoMIPS decoding
engine.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: ea4ca3c22646f5826e4adbfa006b564a5d38da8f
      
https://github.com/qemu/qemu/commit/ea4ca3c22646f5826e4adbfa006b564a5d38da8f
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions

Add emulation of nanoMIPS 16-bit arithmetic instructions.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 764371d24c51336c7713eb6f350218683871d05e
      
https://github.com/qemu/qemu/commit/764371d24c51336c7713eb6f350218683871d05e
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 16-bit branch instructions

Add emulation of nanoMIPS 16-bit branch instructions.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: c46562fb2fd41429c7acbf10dedfd5cbe0aa34fa
      
https://github.com/qemu/qemu/commit/c46562fb2fd41429c7acbf10dedfd5cbe0aa34fa
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 16-bit shift instructions

Add emulation of nanoMIPS 16-bit shift instructions.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 8869ad02bfd9737f6a8fceab5ca286eaa899b790
      
https://github.com/qemu/qemu/commit/8869ad02bfd9737f6a8fceab5ca286eaa899b790
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 16-bit misc instructions

Add emulation of misc nanoMIPS 16-bit instructions.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 8bdb7029c3b73327ba39a59fdc2c6ee3d64b2b24
      
https://github.com/qemu/qemu/commit/8bdb7029c3b73327ba39a59fdc2c6ee3d64b2b24
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 16-bit load and store instructions

Add emulation of LWXS16, LB16, SB16, LBU16, LH16, SH16, LHU16, LW16, LWSP16,
LW4X4, SW4X4, LWGP16, SWSP16, SW16, and SWGP16 instructions.

Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>


  Commit: 80845edf37bac0c1e8d378046bd2b741e4deefc8
      
https://github.com/qemu/qemu/commit/80845edf37bac0c1e8d378046bd2b741e4deefc8
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 16-bit logic instructions

Add emulation of NOT16, AND16, XOR16, OR16 instructions.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: bf0718c59a4b27dd01346a7b5b9a183ed1b18fb7
      
https://github.com/qemu/qemu/commit/bf0718c59a4b27dd01346a7b5b9a183ed1b18fb7
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 16-bit save and restore instructions

Add emulation of SAVE16 and RESTORE.JRC16 instructions. Routines
gen_save(), gen_restore(), and gen_adjust_sp() are provided to support
this feature.

This patch at the same time provides function gen_op_addr_addi(). This
function will be used in emulation of some other nanoMIPS instructions.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: c0280983034627a336248409711e969eb2ea8325
      
https://github.com/qemu/qemu/commit/c0280983034627a336248409711e969eb2ea8325
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of some common nanoMIPS 32-bit instructions

Add emulation of SIGRIE, SYSCALL, BREAK, SDBBP, ADDIU, ADDIUPC,
ADDIUGP.W, LWGP, SWGP, ORI, XORI, ANDI, and other instructions.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 4d18232ca0f903df099d243ccfe28b0e545dc92d
      
https://github.com/qemu/qemu/commit/4d18232ca0f903df099d243ccfe28b0e545dc92d
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV

Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 7ef009b2dd72852505c7348c0bd1f8eb1e62a064
      
https://github.com/qemu/qemu/commit/7ef009b2dd72852505c7348c0bd1f8eb1e62a064
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 48-bit instructions

Add emulation of LI48, ADDIU48, ADDIUGP48, ADDIUPC48, LWPC48, and
SWPC48 instructions.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 579b8ea97a0a4b8e4b9e18d282ab0dc7138d41d1
      
https://github.com/qemu/qemu/commit/579b8ea97a0a4b8e4b9e18d282ab0dc7138d41d1
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS FP instructions

Add emulation of basic floating point arithmetic for nanoMIPS.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: e0cf0e6586d6a2c7e56b58bdfb5a67cec04c2999
      
https://github.com/qemu/qemu/commit/e0cf0e6586d6a2c7e56b58bdfb5a67cec04c2999
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of misc nanoMIPS instructions (pool32a0)

Add emulation of nanoMIPS instructions that are situated in pool32a0.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 642241870a029da1525ad1641e1c99d434580817
      
https://github.com/qemu/qemu/commit/642241870a029da1525ad1641e1c99d434580817
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of misc nanoMIPS instructions (pool32axf)

Add emulation of misc nanoMIPS instructions situated in pool32axf.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: eac5266459fb83e70fbf33f95c7c846f89df5c6a
      
https://github.com/qemu/qemu/commit/eac5266459fb83e70fbf33f95c7c846f89df5c6a
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of misc nanoMIPS instructions (p_lsx)

Add emulation of nanoMIPS instructions situated in pool p_lsx, and
emulation of LSA instruction as well.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: e222f5067269392af489731221750976d0cf3c05
      
https://github.com/qemu/qemu/commit/e222f5067269392af489731221750976d0cf3c05
  Author: Matthew Fortune <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/helper.h
    M target/mips/op_helper.c
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Implement emulation of nanoMIPS ROTX instruction

Added a helper for ROTX based on the pseudocode from the
architecture spec. This instraction was not present in previous
MIPS instruction sets.

Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>


  Commit: 821f2008c3c708e0e33158039ab55673a0f04519
      
https://github.com/qemu/qemu/commit/821f2008c3c708e0e33158039ab55673a0f04519
  Author: James Hogan <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Implement emulation of nanoMIPS EXTW instruction

Implement emulation of nanoMIPS EXTW instruction. EXTW instruction
is similar to the MIPS r6 ALIGN instruction, except that it counts
the other way and in bits instead of bytes. We therefore generalise
gen_align() function into a new gen_align_bits() function (which
counts in bits instead of bytes and optimises when bits = size of
the word), and implement gen_align() and a new gen_ext() based on
that. Since we need to know the word size to check for when the
number of bits == the word size, the opc argument is replaced with
a wordsz argument (either 32 or 64).

Signed-off-by: James Hogan <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>


  Commit: 8f1d9b6d63978b80971b15fef16636f454241879
      
https://github.com/qemu/qemu/commit/8f1d9b6d63978b80971b15fef16636f454241879
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 32-bit load and store instructions

Add emulation of various nanoMIPS load and store instructions.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: ab77fc611bf004dfd25ecad5b2c11261e32012e9
      
https://github.com/qemu/qemu/commit/ab77fc611bf004dfd25ecad5b2c11261e32012e9
  Author: Dimitrije Nikolic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure

Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is
needed for implementing availability control of various instructions.

Reviewed-by: "Aleksandar Markovic <address@hidden>"
Signed-off-by: "Aleksandar Markovic <address@hidden>"


  Commit: 0b16dcd180bdbe3add9edea42c2374d427882661
      
https://github.com/qemu/qemu/commit/0b16dcd180bdbe3add9edea42c2374d427882661
  Author: Aleksandar Rikalo <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M linux-user/mips/cpu_loop.c
    M target/mips/cpu.h
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Implement emulation of nanoMIPS LLWP/SCWP pair

Implement support for nanoMIPS LLWP/SCWP instructions. Beside
adding core functionality of these instructions, this patch adds
support for availability control via configuration bit XNP.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Dimitrije Nikolic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 11d0fc10b7efe3d0404a71e855c0d9f521ce3d66
      
https://github.com/qemu/qemu/commit/11d0fc10b7efe3d0404a71e855c0d9f521ce3d66
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of nanoMIPS 32-bit branch instructions

Add emulation of various flavors of nanoMIPS 32-bit branch
instructions.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 9affc1c59279f482ff145e0371926f79b6448e3e
      
https://github.com/qemu/qemu/commit/9affc1c59279f482ff145e0371926f79b6448e3e
  Author: Aleksandar Rikalo <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Fix pre-nanoMIPS MT ASE instructions availability control

Use bits from configuration registers for availability control
of MT ASE instructions, rather than only ISA_MT bit in insn_flags.
This is done by adding a field in hflags for MT bit, and adding
functions check_mt() and check_cp0_mt().

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 0a1a6ed78ae13a87f23810899a838f8d0c0fa2a5
      
https://github.com/qemu/qemu/commit/0a1a6ed78ae13a87f23810899a838f8d0c0fa2a5
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Implement MT ASE support for nanoMIPS

Add emulation of MT ASE instructions for nanoMIPS.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 3285a3e4445be70d5f2dbdd29249e1e2627a5216
      
https://github.com/qemu/qemu/commit/3285a3e4445be70d5f2dbdd29249e1e2627a5216
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 1

Add emulation of DSP ASE instructions for nanoMIPS - part 1.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 6d033ca7513d85562f1b6bbb002a38b1c2541e5d
      
https://github.com/qemu/qemu/commit/6d033ca7513d85562f1b6bbb002a38b1c2541e5d
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 2

Add emulation of DSP ASE instructions for nanoMIPS - part 2.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 2ed42efaae9516b71b7edf669b120cad718ba37b
      
https://github.com/qemu/qemu/commit/2ed42efaae9516b71b7edf669b120cad718ba37b
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 3

Add emulation of DSP ASE instructions for nanoMIPS - part 3.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 8b3698b2947610e0645a65ace4822164d55dd76b
      
https://github.com/qemu/qemu/commit/8b3698b2947610e0645a65ace4822164d55dd76b
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 4

Add emulation of DSP ASE instructions for nanoMIPS - part 4.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 4c75c985d9b4d2ac7e0183083e31c243b06a3f2b
      
https://github.com/qemu/qemu/commit/4c75c985d9b4d2ac7e0183083e31c243b06a3f2b
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 5

Add emulation of DSP ASE instructions for nanoMIPS - part 5.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 0b591184a2d0686b8f2c5fb27cc9fe2f60752d57
      
https://github.com/qemu/qemu/commit/0b591184a2d0686b8f2c5fb27cc9fe2f60752d57
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 6

Add emulation of DSP ASE instructions for nanoMIPS - part 6.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: fb32f8c8560be7ca4e323cee1b839701126401d1
      
https://github.com/qemu/qemu/commit/fb32f8c8560be7ca4e323cee1b839701126401d1
  Author: Dimitrije Nikolic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add availability control via bit NMS

A set of nanoMIPS instructions is not available if Config5 bit NMS
is set.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>


  Commit: 7a5f784aa215df6bf5d674b4003f8df43bf3b2d4
      
https://github.com/qemu/qemu/commit/7a5f784aa215df6bf5d674b4003f8df43bf3b2d4
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/helper.c

  Log Message:
  -----------
  target/mips: Add updating BadInstr and BadInstrX for nanoMIPS

Update BadInstr and BadInstrX registers for nanoMIPS. The same
support for pre-nanoMIPS remains unimplemented.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 26324ded91a5ad08a5de8f32b8ed5e5e243154cf
      
https://github.com/qemu/qemu/commit/26324ded91a5ad08a5de8f32b8ed5e5e243154cf
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/op_helper.c

  Log Message:
  -----------
  target/mips: Fix ERET/ERETNC behavior related to ADEL exception

Fix ERET/ERETNC so that ADEL exception can be raised.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 2a94de07706a702a65fed50a837f7a76d452ae05
      
https://github.com/qemu/qemu/commit/2a94de07706a702a65fed50a837f7a76d452ae05
  Author: Aleksandar Rikalo <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M include/elf.h

  Log Message:
  -----------
  elf: Add EM_NANOMIPS value as a valid one for e_machine field

Value 249 is registered as valid for usage for nanoMIPS executables.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: f72541f3a595e27242e12175650ad09fdbeda296
      
https://github.com/qemu/qemu/commit/f72541f3a595e27242e12175650ad09fdbeda296
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M linux-user/elfload.c

  Log Message:
  -----------
  elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too

Starting from nanoMIPS introduction, machine variant can be
EM_MIPS or EM_NANOMIPS.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 56f26045dc00c8ac370735afb1dec72e9c4dbd98
      
https://github.com/qemu/qemu/commit/56f26045dc00c8ac370735afb1dec72e9c4dbd98
  Author: Aleksandar Rikalo <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M include/hw/elf_ops.h

  Log Message:
  -----------
  elf: On elf loading, treat both EM_MIPS and EM_NANOMIPS as legal for MIPS

Modify load_elf32()/load_elf64() to treat EM_NANOMIPS as legal as
EM_MIPS is.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 722ac96cd69e38cf9689d29bdd3535a0eb8b2b93
      
https://github.com/qemu/qemu/commit/722ac96cd69e38cf9689d29bdd3535a0eb8b2b93
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M linux-user/mips/cpu_loop.c

  Log Message:
  -----------
  elf: Don't check FCR31_NAN2008 bit for nanoMIPS

nanoMIPS is always NaN2008 compliant, and rules for checking
FCR31's NAN2008 bit are obsoleted.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: ce3940ccca34b9290f77e5347523d40a4d9c9384
      
https://github.com/qemu/qemu/commit/ce3940ccca34b9290f77e5347523d40a4d9c9384
  Author: Matthew Fortune <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M hw/mips/mips_malta.c

  Log Message:
  -----------
  mips_malta: Add basic nanoMIPS boot code for Malta board

Add basic nanoMIPS boot code for Malta.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 28861af8e94ada07b073d8775e11cc44cae5f4e5
      
https://github.com/qemu/qemu/commit/28861af8e94ada07b073d8775e11cc44cae5f4e5
  Author: Paul Burton <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M hw/mips/mips_malta.c

  Log Message:
  -----------
  mips_malta: Add setting up GT64120 BARs to the nanoMIPS bootloader

Setup the GT64120 BARs in the nanoMIPS bootloader, in the same way that
they are setup in the MIPS32 bootloader. This is necessary for Linux to
be able to access peripherals, including the UART.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Paul Burton <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: bf4667d05a1386df2dffcbf1eb652f79d25b4cb2
      
https://github.com/qemu/qemu/commit/bf4667d05a1386df2dffcbf1eb652f79d25b4cb2
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M hw/mips/mips_malta.c

  Log Message:
  -----------
  mips_malta: Fix semihosting argument passing for nanoMIPS bare metal

Fix passing argument for nanoMIPS bare metal related to the
semihosting regime.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: d45942d908edee175a90f915ab92ac302eedf33a
      
https://github.com/qemu/qemu/commit/d45942d908edee175a90f915ab92ac302eedf33a
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M target/mips/translate_init.inc.c

  Log Message:
  -----------
  target/mips: Add definition of nanoMIPS I7200 CPU

Add definition of the first nanoMIPS processor in QEMU.

Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: e2e6fa67931fdba493e10cc55abcc99a65c92c7b
      
https://github.com/qemu/qemu/commit/e2e6fa67931fdba493e10cc55abcc99a65c92c7b
  Author: Peter Maydell <address@hidden>
  Date:   2018-08-24 (Fri, 24 Aug 2018)

  Changed paths:
    M hw/mips/mips_malta.c
    M include/elf.h
    M include/hw/elf_ops.h
    M linux-user/elfload.c
    M linux-user/mips/cpu_loop.c
    M target/mips/cpu.h
    M target/mips/helper.c
    M target/mips/helper.h
    M target/mips/mips-defs.h
    M target/mips/op_helper.c
    M target/mips/translate.c
    M target/mips/translate_init.inc.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-aug-2018' 
into staging

MIPS queue August 2018 v6

# gpg: Signature made Fri 24 Aug 2018 16:52:27 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <address@hidden>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-aug-2018: (45 commits)
  target/mips: Add definition of nanoMIPS I7200 CPU
  mips_malta: Fix semihosting argument passing for nanoMIPS bare metal
  mips_malta: Add setting up GT64120 BARs to the nanoMIPS bootloader
  mips_malta: Add basic nanoMIPS boot code for Malta board
  elf: Don't check FCR31_NAN2008 bit for nanoMIPS
  elf: On elf loading, treat both EM_MIPS and EM_NANOMIPS as legal for MIPS
  elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too
  elf: Add EM_NANOMIPS value as a valid one for e_machine field
  target/mips: Fix ERET/ERETNC behavior related to ADEL exception
  target/mips: Add updating BadInstr and BadInstrX for nanoMIPS
  target/mips: Add availability control via bit NMS
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 6
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 5
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 4
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 3
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 2
  target/mips: Add emulation of DSP ASE for nanoMIPS - part 1
  target/mips: Implement MT ASE support for nanoMIPS
  target/mips: Fix pre-nanoMIPS MT ASE instructions availability control
  target/mips: Add emulation of nanoMIPS 32-bit branch instructions
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/746b7907feeb...e2e6fa67931f
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