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Re: [Qemu-devel] Re: compile qemu for a G5

From: Joshua Root
Subject: Re: [Qemu-devel] Re: compile qemu for a G5
Date: Wed, 13 Oct 2004 04:55:25 +1000

On Tue, 12 Oct 2004 13:50:41 +0200, J. Mayer <address@hidden> wrote:
 Are you sure ?
 G5 is a 64 bits PPC, but POWER isn't: some instructions are not the same
 between the two architectures.  So, some Power4 opcodes and registers
 will never be recognized on any PPC. With luck, the Power code may run
 on PPC, but there's no waranty.

The PowerPC ISA is *broadly* compatible with POWER 's. I suggest you
to read up some technical documents on the subject. Plenty of them
have been made available at IBM's developer pages.

Moreover, POWER4 *IS* 64-bit, and -mcpu=power4 used to be the only way
to invoke G5-specific optimizations on GCC. I haven't kept myself
updated with the docs, though, and the flags were changed in some
later revision of the XCode (I don't have a G5-class machine, so I
thought it was somewhat pointless to know the details until I needed

Here are the current recommended flags:

Here's some evidence on the -mcpu=power4 flag now-deprecated usage:
(scroll up a bit to the "Type conversion is costly" paragraph)

IIRC, the POWER4 is in fact a PowerPC, while earlier POWER chips are not. That is why -mcpu=power4 will work on a G5. There is some info on the relationship between the two ISAs in gcc's man page:

"The POWER instruction set are those instruc-
tions supported by the rios chip set used in the original RS/6000
systems and the PowerPC instruction set is the architecture of the
Motorola MPC5xx, MPC6xx, MPC8xx microprocessors, and the IBM 4xx

Neither architecture is a subset of the other.  However there is a
large common subset of instructions supported by both.  An MQ reg-
ister is included in processors supporting the POWER architecture."

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