[Qemu-devel] [PATCH 3/8] Mips improvements

[Thiemo Seufer]

Hello All,

this is a general code cleanup, it simplifies some expressions and
gets rid of a few magic constants.


Thiemo


Index: qemu-work/target-mips/helper.c
===================================================================
--- qemu-work.orig/target-mips/helper.c 2006-05-07 23:38:48.000000000 +0100
+++ qemu-work/target-mips/helper.c      2006-05-07 23:39:19.000000000 +0100
@@ -40,8 +40,8 @@
     int ret;
 
     ret = -2;
-    tag = (address & 0xFFFFE000);
-    ASID = env->CP0_EntryHi & 0x000000FF;
+    tag = address & 0xFFFFE000;
+    ASID = env->CP0_EntryHi & 0xFF;
     for (i = 0; i < MIPS_TLB_NB; i++) {
         tlb = &env->tlb[i];
         /* Check ASID, virtual page number & size */
@@ -74,7 +74,7 @@
     int ret;
 
     /* User mode can only access useg */
-    user_mode = ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) ? 1 : 0;
+    user_mode = (env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM;
 #if 0
     if (logfile) {
         fprintf(logfile, "user mode %d h %08x\n",
@@ -231,7 +231,7 @@
         env->CP0_Context = (env->CP0_Context & 0xff800000) |
                           ((address >> 9) &   0x007ffff0);
         env->CP0_EntryHi =
-            (env->CP0_EntryHi & 0x000000FF) | (address & 0xFFFFF000);
+            (env->CP0_EntryHi & 0xFF) | (address & 0xFFFFF000);
         env->exception_index = exception;
         env->error_code = error_code;
         ret = 1;
Index: qemu-work/target-mips/op_helper.c
===================================================================
--- qemu-work.orig/target-mips/op_helper.c      2006-05-07 22:59:29.000000000 
+0100
+++ qemu-work/target-mips/op_helper.c   2006-05-07 23:41:05.000000000 +0100
@@ -330,13 +330,13 @@
         rn = "Index";
         break;
     case 2:
-        val = T0 & 0x03FFFFFFF;
+        val = T0 & 0x3FFFFFFF;
         old = env->CP0_EntryLo0;
         env->CP0_EntryLo0 = val;
         rn = "EntryLo0";
         break;
     case 3:
-        val = T0 & 0x03FFFFFFF;
+        val = T0 & 0x3FFFFFFF;
         old = env->CP0_EntryLo1;
         env->CP0_EntryLo1 = val;
         rn = "EntryLo1";
@@ -403,20 +403,17 @@
                     old, val, env->CP0_Cause, old & mask, val & mask,
                     env->CP0_Cause & mask);
         }
-#if 1
         if ((val & (1 << CP0St_IE)) && !(old & (1 << CP0St_IE)) &&
             !(env->hflags & MIPS_HFLAG_EXL) &&
             !(env->hflags & MIPS_HFLAG_ERL) &&
-            !(env->hflags & MIPS_HFLAG_DM) && 
+            !(env->hflags & MIPS_HFLAG_DM) &&
             (env->CP0_Status & env->CP0_Cause & mask)) {
             if (logfile)
                 fprintf(logfile, "Raise pending IRQs\n");
             env->interrupt_request |= CPU_INTERRUPT_HARD;
-            do_raise_exception(EXCP_EXT_INTERRUPT);
-        } else if (!(val & 0x00000001) && (old & 0x00000001)) {
+        } else if (!(val & (1 << CP0St_IE)) && (old & (1 << CP0St_IE))) {
             env->interrupt_request &= ~CPU_INTERRUPT_HARD;
         }
-#endif
         rn = "Status";
         break;
     case 13:
@@ -605,9 +602,9 @@
     uint8_t ASID;
     int i;
 
-    tag = (env->CP0_EntryHi & 0xFFFFE000);
-    ASID = env->CP0_EntryHi & 0x000000FF;
-        for (i = 0; i < MIPS_TLB_NB; i++) {
+    tag = env->CP0_EntryHi & 0xFFFFE000;
+    ASID = env->CP0_EntryHi & 0xFF;
+    for (i = 0; i < MIPS_TLB_NB; i++) {
         tlb = &env->tlb[i];
         /* Check ASID, virtual page number & size */
         if ((tlb->G == 1 || tlb->ASID == ASID) && tlb->VPN == tag) {
Index: qemu-work/target-mips/translate.c
===================================================================
--- qemu-work.orig/target-mips/translate.c      2006-05-07 22:59:29.000000000 
+0100
+++ qemu-work/target-mips/translate.c   2006-05-07 23:39:19.000000000 +0100
@@ -1614,7 +1614,7 @@
 #if defined(CONFIG_USER_ONLY)
     ctx.mem_idx = 0;
 #else
-    ctx.mem_idx = (ctx.hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM ? 0 : 1;
+    ctx.mem_idx = !((ctx.hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM);
 #endif
     ctx.CP0_Status = env->CP0_Status;
 #ifdef DEBUG_DISAS