--- qemu-0.8.2.orig/hw/piix_pci.c	2006-07-22 17:23:34.000000000 +0000
+++ qemu-0.8.2/hw/piix_pci.c	2006-09-13 03:05:53.000000000 +0000
@@ -42,7 +42,7 @@
 
 static void piix3_set_irq(PCIDevice *pci_dev, void *pic, int irq_num, int level);
 
-PCIBus *i440fx_init(void)
+PCIBus *i440fx_init(int ram_size)
 {
     PCIBus *b;
     PCIDevice *d;
@@ -73,6 +73,10 @@
     d->config[0x0a] = 0x00; // class_sub = host2pci
     d->config[0x0b] = 0x06; // class_base = PCI_bridge
     d->config[0x0e] = 0x00; // header_type
+    ram_size = ram_size / 8 / 1024 / 1024;
+    if (ram_size > 255)
+        ram_size = 255;
+    d->config[0x57] = ram_size;
     return b;
 }
 
--- qemu-0.8.2.orig/hw/pc.c	2006-09-12 23:33:03.000000000 +0000
+++ qemu-0.8.2/hw/pc.c	2006-09-13 02:38:33.000000000 +0000
@@ -747,7 +749,7 @@
     }
 
     if (pci_enabled) {
-        pci_bus = i440fx_init();
+        pci_bus = i440fx_init(ram_size);
         piix3_devfn = piix3_init(pci_bus);
     } else {
         pci_bus = NULL;
--- qemu-0.8.2.orig/vl.h	2006-09-12 23:33:03.000000000 +0000
+++ qemu-0.8.2/vl.h	2006-09-13 02:39:48.000000000 +0000
@@ -695,7 +695,7 @@
 PCIBus *pci_vpb_init(void *pic);
 
 /* piix_pci.c */
-PCIBus *i440fx_init(void);
+PCIBus *i440fx_init(int ram_size);
 int piix3_init(PCIBus *bus);
 void pci_bios_init(void);