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Re: [Qemu-devel] why do qem/arm not clear CPU_INTERRUPT_HARD bit of env-

From: Paul Brook
Subject: Re: [Qemu-devel] why do qem/arm not clear CPU_INTERRUPT_HARD bit of env->interrupt_request automatically?
Date: Sun, 8 Oct 2006 03:23:21 +0100
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On Saturday 07 October 2006 19:15, Donald Liew wrote:
> i'm reading qemu-system-arm code and trying to add some more
> evaluation boards support for it. in the 0.8.2 source code i found
> something i can't understand, when handling interrupts all other
> targets clears this bit after calling do_interrupt, however the arm
> target doesn't do this, why? won't this cause problems like redundant
> interrupts? any special consideration about this?

I this this is the correct behavior. The nIRQ line is level triggered. 
spurious interrupts are avoided because do_interrupt sets the CPSR_I flag.

During normal operation theguest OS will clear the IRQ condition (by masking 
the interrupt on the PIC or device) before clearing the CPSE_I flag, so it 
doesn't matter what we do.

Consider the case where the guest OS were to clear CPSR_F without touching the 
IRQ line. In this case we would expect annother IRQ exception to be taken 
immediately. If (as you suggest above) we cleared CPU_INTERRUPT_HARD in 
cpu_exec then the IRQ would not be taken until something re-raised the IRQ 


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