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Re: [Qemu-devel] PATCH stfiwx implementation
From: |
Tom Marn |
Subject: |
Re: [Qemu-devel] PATCH stfiwx implementation |
Date: |
Wed, 11 Oct 2006 10:05:55 +0200 |
User-agent: |
Thunderbird 1.5.0.2 (X11/20060516) |
Hi
Resending fixed patch, mirror fix in glue(stfi, MEMSUFFIX) function; bitwise typo:
&& instead of &.
Tom Marn
Patch which appends optional "stfiwx" PowerPC instruction into QEMU.
Mirror fix of patch: 2006-10-11 : bitwise typo && instead &
Tom Marn
--- target-ppc/translate.c.orig 2006-10-11 09:05:17.000000000 +0200
+++ target-ppc/translate.c 2006-10-11 09:56:02.000000000 +0200
@@ -1716,14 +1716,29 @@ GEN_STFS(fs, 0x14);
/* Optional: */
/* stfiwx */
-GEN_HANDLER(stfiwx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT)
-{
- if (!ctx->fpu_enabled) {
- RET_EXCP(ctx, EXCP_NO_FP, 0);
- return;
- }
- RET_INVAL(ctx);
-}
+#define GEN_STWXF(width) \
+GEN_HANDLER(st##width##wx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT) \
+{ \
+ if (!ctx->fpu_enabled) { \
+ RET_EXCP(ctx, EXCP_NO_FP, 0); \
+ return; \
+ } \
+ if (rA(ctx->opcode) == 0) { \
+ gen_op_load_gpr_T0(rB(ctx->opcode)); \
+ } else { \
+ gen_op_load_gpr_T0(rA(ctx->opcode)); \
+ gen_op_load_gpr_T1(rB(ctx->opcode)); \
+ gen_op_add(); \
+ } \
+ gen_op_load_fpr_FT1(rS(ctx->opcode)); \
+ op_ldst(st##width); \
+}
+
+#define GEN_STFI(width) \
+OP_ST_TABLE(width); \
+GEN_STWXF(width);
+
+GEN_STFI(fi);
/*** Branch ***/
--- target-ppc/op_mem.h.orig 2006-10-11 09:05:28.000000000 +0200
+++ target-ppc/op_mem.h 2006-10-11 09:52:28.000000000 +0200
@@ -187,6 +187,30 @@ PPC_OP(glue(glue(st, name), MEMSUFFIX))
PPC_STF_OP(fd, stfq);
PPC_STF_OP(fs, stfl);
+
+static inline void glue(stfi, MEMSUFFIX) (target_ulong EA, float f)
+{
+ union {
+ float f;
+ uint32_t u;
+ } u;
+
+ u.f = f;
+ u.u = u.u & 0x00000000FFFFFFFFULL;
+ glue(stl, MEMSUFFIX)(T0, u.f);
+ RETURN();
+}
+
+#if 0
+static inline void glue(stfi, MEMSUFFIX) (target_ulong EA, float f)
+{
+ glue(stl, MEMSUFFIX)(T0,(int)f);
+ RETURN();
+}
+#endif
+
+PPC_STF_OP(fi, stfi);
+
static inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d)
{
union {
@@ -224,6 +248,23 @@ static inline void glue(stflr, MEMSUFFIX
PPC_STF_OP(fd_le, stfqr);
PPC_STF_OP(fs_le, stflr);
+static inline void glue(stfir, MEMSUFFIX) (target_ulong EA, float f)
+{
+ union {
+ float f;
+ uint32_t u;
+ } u;
+
+ u.f = f;
+ u.u = ((u.u & 0xFF000000UL) >> 24) |
+ ((u.u & 0x00FF0000ULL) >> 8) |
+ ((u.u & 0x0000FF00UL) << 8) |
+ ((u.u & 0x000000FFULL) << 24);
+ glue(stfi, MEMSUFFIX)(EA, u.f);
+}
+
+PPC_STF_OP(fi_le, stfir);
+
/*** Floating-point load ***/
#define PPC_LDF_OP(name, op) \
PPC_OP(glue(glue(l, name), MEMSUFFIX)) \