qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PATCH] Check machine type and endianness in softmmu ELF lo


From: Thiemo Seufer
Subject: [Qemu-devel] [PATCH] Check machine type and endianness in softmmu ELF loader
Date: Tue, 12 Dec 2006 19:34:23 +0000
User-agent: Mutt/1.5.13 (2006-08-11)

Hello All,

the appended patch check the machine type and the endianness of the
ELF binaries involved. For MIPS it removes the raw binary backward
compatibility mode, recent kernels won't work with as raw binaries.

I'm not sure if machine check is good enough. If it has to check
for more than one EM_* value, or if we want to have a more descriptive
error message, then it might need to become a per-architecture
function hook.

Comnments?


Thiemo


Index: qemu-work/elf_ops.h
===================================================================
--- qemu-work.orig/elf_ops.h    2006-12-07 22:24:45.000000000 +0000
+++ qemu-work/elf_ops.h 2006-12-12 18:43:11.000000000 +0000
@@ -153,6 +153,9 @@
         glue(bswap_ehdr, SZ)(&ehdr);
     }
 
+    if (ELF_MACHINE != ehdr.e_machine)
+        goto fail;
+
     if (pentry)
        *pentry = (uint64_t)ehdr.e_entry;
 
@@ -164,7 +167,7 @@
     if (!phdr)
         goto fail;
     if (read(fd, phdr, size) != size)
-        goto fail;
+        goto fail1;
     if (must_swab) {
         for(i = 0; i < ehdr.e_phnum; i++) {
             ph = &phdr[i];
@@ -181,9 +184,9 @@
             data = qemu_mallocz(mem_size);
             if (ph->p_filesz > 0) {
                 if (lseek(fd, ph->p_offset, SEEK_SET) < 0)
-                    goto fail;
+                    goto fail2;
                 if (read(fd, data, ph->p_filesz) != ph->p_filesz)
-                    goto fail;
+                    goto fail2;
             }
             addr = ph->p_vaddr + virt_to_phys_addend;
 
@@ -197,9 +200,11 @@
     }
     qemu_free(phdr);
     return total_size;
- fail:
+fail2:
     qemu_free(data);
+fail1:
     qemu_free(phdr);
+fail:
     return -1;
 }
 
Index: qemu-work/hw/mips_r4k.c
===================================================================
--- qemu-work.orig/hw/mips_r4k.c        2006-12-07 22:24:45.000000000 +0000
+++ qemu-work/hw/mips_r4k.c     2006-12-12 18:43:11.000000000 +0000
@@ -11,7 +11,6 @@
 
 #define BIOS_FILENAME "mips_bios.bin"
 //#define BIOS_FILENAME "system.bin"
-#define KERNEL_LOAD_ADDR 0x80010000
 #define INITRD_LOAD_ADDR 0x80800000
 
 #define VIRT_TO_PHYS_ADDEND (-0x80000000LL)
@@ -77,14 +76,9 @@
     if (kernel_size >= 0)
         env->PC = entry;
     else {
-        kernel_size = load_image(kernel_filename,
-                                 phys_ram_base + KERNEL_LOAD_ADDR + 
VIRT_TO_PHYS_ADDEND);
-        if (kernel_size < 0) {
-            fprintf(stderr, "qemu: could not load kernel '%s'\n",
-                    kernel_filename);
-            exit(1);
-        }
-        env->PC = KERNEL_LOAD_ADDR;
+        fprintf(stderr, "qemu: could not load kernel '%s'\n",
+                kernel_filename);
+        exit(1);
     }
 
     /* load initrd */
Index: qemu-work/loader.c
===================================================================
--- qemu-work.orig/loader.c     2006-12-07 22:24:45.000000000 +0000
+++ qemu-work/loader.c  2006-12-12 18:43:11.000000000 +0000
@@ -197,7 +197,7 @@
 int load_elf(const char *filename, int64_t virt_to_phys_addend,
              uint64_t *pentry)
 {
-    int fd, data_order, must_swab, ret;
+    int fd, data_order, host_data_order, must_swab, ret;
     uint8_t e_ident[EI_NIDENT];
 
     fd = open(filename, O_RDONLY | O_BINARY);
@@ -218,7 +218,15 @@
     data_order = ELFDATA2LSB;
 #endif
     must_swab = data_order != e_ident[EI_DATA];
-    
+
+#ifdef TARGET_WORDS_BIGENDIAN
+    host_data_order = ELFDATA2MSB;
+#else
+    host_data_order = ELFDATA2LSB;
+#endif
+    if (host_data_order != e_ident[EI_DATA])
+        return -1;
+
     lseek(fd, 0, SEEK_SET);
     if (e_ident[EI_CLASS] == ELFCLASS64) {
         ret = load_elf64(fd, virt_to_phys_addend, must_swab, pentry);
Index: qemu-work/target-mips/cpu.h
===================================================================
--- qemu-work.orig/target-mips/cpu.h    2006-12-12 18:43:10.000000000 +0000
+++ qemu-work/target-mips/cpu.h 2006-12-12 19:07:44.000000000 +0000
@@ -3,6 +3,8 @@
 
 #define TARGET_HAS_ICE 1
 
+#define ELF_MACHINE    EM_MIPS
+
 #include "config.h"
 #include "mips-defs.h"
 #include "cpu-defs.h"
Index: qemu-work/target-arm/cpu.h
===================================================================
--- qemu-work.orig/target-arm/cpu.h     2006-12-12 19:02:13.000000000 +0000
+++ qemu-work/target-arm/cpu.h  2006-12-12 19:08:45.000000000 +0000
@@ -22,6 +22,8 @@
 
 #define TARGET_LONG_BITS 32
 
+#define ELF_MACHINE    EM_ARM
+
 #include "cpu-defs.h"
 
 #include "softfloat.h"
Index: qemu-work/target-i386/cpu.h
===================================================================
--- qemu-work.orig/target-i386/cpu.h    2006-12-12 19:02:13.000000000 +0000
+++ qemu-work/target-i386/cpu.h 2006-12-12 19:08:35.000000000 +0000
@@ -36,6 +36,12 @@
 
 #define TARGET_HAS_ICE 1
 
+#ifdef TARGET_X86_64
+#define ELF_MACHINE    EM_X86_64
+#else
+#define ELF_MACHINE    EM_386
+#endif
+
 #include "cpu-defs.h"
 
 #include "softfloat.h"
Index: qemu-work/target-m68k/cpu.h
===================================================================
--- qemu-work.orig/target-m68k/cpu.h    2006-12-12 19:02:13.000000000 +0000
+++ qemu-work/target-m68k/cpu.h 2006-12-12 19:07:04.000000000 +0000
@@ -31,6 +31,8 @@
 
 #define TARGET_HAS_ICE 1
 
+#define ELF_MACHINE    EM_68K
+
 #define EXCP_ACCESS         2   /* Access (MMU) error.  */
 #define EXCP_ADDRESS        3   /* Address error.  */
 #define EXCP_ILLEGAL        4   /* Illegal instruction.  */
Index: qemu-work/target-ppc/cpu.h
===================================================================
--- qemu-work.orig/target-ppc/cpu.h     2006-12-12 19:02:13.000000000 +0000
+++ qemu-work/target-ppc/cpu.h  2006-12-12 19:06:49.000000000 +0000
@@ -32,6 +32,8 @@
 
 #define TARGET_HAS_ICE 1
 
+#define ELF_MACHINE    EM_PPC
+
 /* XXX: this should be tunable: PowerPC 601 & 64 bits PowerPC
  *                              have different cache line sizes
  */
Index: qemu-work/target-sh4/cpu.h
===================================================================
--- qemu-work.orig/target-sh4/cpu.h     2006-12-12 19:02:13.000000000 +0000
+++ qemu-work/target-sh4/cpu.h  2006-12-12 19:04:16.000000000 +0000
@@ -25,6 +25,8 @@
 #define TARGET_LONG_BITS 32
 #define TARGET_HAS_ICE 1
 
+#define ELF_MACHINE    EM_SH
+
 #include "cpu-defs.h"
 
 #include "softfloat.h"
Index: qemu-work/target-sparc/cpu.h
===================================================================
--- qemu-work.orig/target-sparc/cpu.h   2006-12-12 19:02:13.000000000 +0000
+++ qemu-work/target-sparc/cpu.h        2006-12-12 19:05:27.000000000 +0000
@@ -19,6 +19,12 @@
 
 #define TARGET_HAS_ICE 1
 
+#if !defined(TARGET_SPARC64)
+#define ELF_MACHINE    EM_SPARC
+#else
+#define ELF_MACHINE    EM_SPARCV9
+#endif
+
 /*#define EXCP_INTERRUPT 0x100*/
 
 /* trap definitions */




reply via email to

[Prev in Thread] Current Thread [Next in Thread]