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Re: [Qemu-devel] Redundant repz prefixes in generated amd64 code
From: |
Paul Brook |
Subject: |
Re: [Qemu-devel] Redundant repz prefixes in generated amd64 code |
Date: |
Fri, 16 Mar 2007 18:14:57 +0000 |
User-agent: |
KMail/1.9.5 |
> > 0000000000008b50 <op_goto_tb1>:
> > 8b50: 8b 05 00 00 00 00 mov 0(%rip),%eax
> > 8b52: R_X86_64_PC32 __op_param1+0x3c
> > 8b56: ff e0 jmpq *%rax
> > 8b58: f3 c3 repz retq
> >
> > qemu only strips the final ret off.
> > The prefixed ret is to avoid prefetch stalls on amd cpus.
>
> So the implication of this is that the generated code just happens to
> work only because the dangling F3 never ends up in front of some other
> instruction which it would change the meaning of?
Correct.
Paul