Re: [Qemu-devel] scsi patch

[Wang Cheng Yeh]

because
(1) address of SCRATCHA is 0x34
(2) address from SCRATCHB to SCRATCHR are 0x5c ~ 0x9f

you just see the code about part (2).
I think the access code is right.

2007/3/19, Thiemo Seufer < address@hidden>:

????????? wrote:
> --- ../../tmp/qemu- 0.9.0/hw/lsi53c895a.c        2007-02-06 07:01:
> 54.000000000 +0800
> +++ lsi53c895a.c        2007-03-08 20:50:03.094098835 +0800
> @@ -251,7 +251,7 @@
>     uint32_t ia;
>     uint32_t sbc;
>     uint32_t csbc;
> -    uint32_t scratch[13]; /* SCRATCHA-SCRATCHR */
> +    uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */

This still looks inconsistent. SCRATCHR suggests 18 available
registers, but the code below handles only 17 scratch registers.

Could you check what's the right thing there?
Otherwise the patch looks good.


Thiemo