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Re: [Qemu-devel] [Bug] [Patch] MIPS code fails at branch instruction

From: Thiemo Seufer
Subject: Re: [Qemu-devel] [Bug] [Patch] MIPS code fails at branch instruction
Date: Tue, 20 Mar 2007 09:51:50 +0000
User-agent: Mutt/1.5.13 (2006-08-11)

Alexander Voropay wrote:
> "Thiemo Seufer" <address@hidden> wrote:
> >For the AR7 case, could you
> >- add AR7 as a CPU type
> >- handle the interesting cases for AR7 only, after verifying the
> >  cornercase behaviour of qemu and real hardware is consistent.
> AFAIK, Texas Instrument AR7 isn't a CPU. It's a SoC which
> combines well-known MIPS 4KEc synthesizable *core* and ADSL stuff.

Other 4KEc behave differently (probably due to differences in the
synthesizing technology used), so I figure AR7 becomes a special
CPU for qemu's purposes.


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