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Re: [Qemu-devel] 4G address space remapping on 64-bit host

From: Paul Brook
Subject: Re: [Qemu-devel] 4G address space remapping on 64-bit host
Date: Fri, 29 Jun 2007 22:03:06 +0100
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> > I'd expect the overhead of SIGSEGV+mmap to be prohibitive. I don't have
> > numbers to back this up, but experience with MIPS system emulation shows
> > that TLB miss cost can have significant effect on overall performance.
> I'd say this can't be worse than on MacOS X where Mach exception
> handling is terribly slow. Typically 100 usec per fault
> caught+mprotect where Linux requires less than 5 usec to do the same.

Maybe. I'll agree OSX memory management can be horribly slow[1].

> > Like Fabrice, I think this would be most useful in combination with some
> > sort of hypervisor.  Somewhere on my TODO list is porting qemu to run
> > directly as a paravirtual Xen DomU.  This means you can insert the guest
> > pagetable walk directly into the host mmu fault handler, and do clever
> > things with shadow pagetables.
> This would be great. As Fabrice mentioned, the tricky part would be to
> run the translator in the upper part or lower part of the 32-bit
> address space. Would fixing compilation with -pie help this (with some
> provisions for the dyngen ops) or do you see another means to achieve
> this?

My initial plan was to punt, and only worry about 64-bit hosts :-)

Using segmentation to chop a lump out of the address space is probably the 
simplest, and efficient as long as your OS doesn't try to access that area.
The hardest bit is emulating accesses that trap, but since we also control the 
(emulated) guest code we know which instructions we need to decode.


[1] This is from experience trying to make gcc go fast on that platform, not 
just random apple-bashing :-)

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