[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 0/6] Add UUID command-line option

From: Gleb Natapov
Subject: Re: [Qemu-devel] [PATCH 0/6] Add UUID command-line option
Date: Sun, 24 Aug 2008 17:11:43 +0300

On Sun, Aug 24, 2008 at 04:35:00PM +0300, Blue Swirl wrote:
> >  > >  >               UUID is not architecture specific, so it should use 
> > the
> >  > >  > main structure instead if the architecture specific substructure
> >  > >  > (nvram_arch*). Adding UUID to unused fields will not break anything.
> >  > >
> >  > > Most info in ohwcfg_v3_t are not needed (or can be obtained by other
> >  > >  means) by PC BIOS, so there is no point in coping the whole structure
> >  > >  into BIOS. Of cause BIOS don't have to copy entire ohwcfg_v3_t, but
> >  >
> >  > For example, Bochs seems to use i440fx registers to determine the
> >  > available physical memory. This could be changed to use the
> >  > configuration structure instead. It's a matter of taste, but I would
> >  > find this an improvement.
> >
> > If by Bochs you mean Bochs BIOS then this is not the case. There are
> >  standard CMOS locations where amount of available memory is specified.
> >  Qemu initialize those locations and BIOS reads them. I don't think this is
> >  going to change since Bochs BIOS is used not only by Qemu. If only Bochs
> >  will move to firmware interface too...
> If we can push UUID or ACPI patches, we can push just as easily
> configuration ROM and related interface patches. Of course Bochs devs
> could want other changes.
I don't what to speak on behalf of bochs developers, but I am not sure
about "as easily" part. Why change something that works for both qemu and
bochs to qemu specific way and guard it with ifdefs.

> >  > >  access only required fields by reading only specific offsets, but 
> > then the
> >  > >  interface will be exactly like the one I proposed with only difference
> >  > >  that instead of specifying magic value (like 1 for reading UUID in my
> >  > >  patch series), BIOS will have to specify magic offset (like 0xE0).
> >  >
> >  > There is no need for a magic offset, ohwcfg_v3_t is designed to be
> >  > included even from asm.
> >  >
> >
> > The thing is I don't want to copy the whole ROM into BIOS during boot.
> >  As far as I see on other platforms ROM is memory mapped, so no copying
> >  is required and this was you first proposal, but if we are going to use
> >  port IO to access ROM then it will either have to be copied into main
> >  memory and then accessed, or only required fields  will have to be
> >  copied and that mean coping data from magic offsets.
> I'd still prefer to use a memory mapped interface, but I was told that
> this would not be easy to access from 16 bit code. It's equally
> possible to make the ROM indexed even on Sparc32 or maybe even add a
> hidden m48t59 to PC.
> Maybe we mean different things with a magic offset. Bochs BIOS sources
> can include firmware_abi.h unchanged, then use the #defined offsets to
> access either a memory-mapped ROM or IO port version. To my mind this
> does not mean using any magic offsets.

By magic offset I mean 0xE0 in the code below that will be added to BIOS to
read UUID in case we will use firmware interface:

     outl(QEMU_CFG_PORT, 0xE0 /* why not 1 ? */);
       uuid[i] = intb(QEMU_CFG_PORT);

To read CPU frequency we should do:
     outl(QEMU_CFG_PORT, some other offset /* why not 2 */);

To read acpi table:
     outl(QEMU_CFG_PORT, one more offset /* why not 3 */)

To read one more parameter
     outl(QEMU_CFG_PORT, this time the offset depends on the size of previously 
read acpi table)

The patch that make bochs BIOS to use my proposed interface is attached
just to clarify the interface.

So let me ask you a question. What's actually the advantage of using firmware
ABI? It surely don't make our job easier as we have to extend it to get
information we need and we don't need any information it provides.


Attachment: patch
Description: Text document

reply via email to

[Prev in Thread] Current Thread [Next in Thread]