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[Qemu-devel] [RESEND][PATCH 1/2] Log reset events - v2
From: |
Jan Kiszka |
Subject: |
[Qemu-devel] [RESEND][PATCH 1/2] Log reset events - v2 |
Date: |
Tue, 02 Sep 2008 13:55:46 +0200 |
User-agent: |
Mozilla/5.0 (X11; U; Linux i686 (x86_64); de; rv:1.8.1.12) Gecko/20080226 SUSE/2.0.0.12-1.1 Thunderbird/2.0.0.12 Mnenhy/0.7.5.666 |
Original idea&code by Kevin Wolf, split-up in two patches and added more
archs.
This patch introduces a flag to log CPU resets. Useful for tracing
unexpected resets (such as those triggered by x86 triple faults).
Signed-off-by: Jan Kiszka <address@hidden>
Acked-by: Kevin Wolf <address@hidden>
---
cpu-all.h | 1 +
exec.c | 2 ++
target-arm/helper.c | 6 ++++++
target-cris/translate.c | 5 +++++
target-i386/helper.c | 5 +++++
target-m68k/helper.c | 5 +++++
target-mips/translate.c | 5 +++++
target-ppc/helper.c | 8 ++++++--
target-sh4/translate.c | 5 +++++
target-sparc/helper.c | 5 +++++
10 files changed, 45 insertions(+), 2 deletions(-)
Index: b/exec.c
===================================================================
--- a/exec.c
+++ b/exec.c
@@ -1551,6 +1551,8 @@ CPULogItem cpu_log_items[] = {
#ifdef TARGET_I386
{ CPU_LOG_PCALL, "pcall",
"show protected mode far calls/returns/exceptions" },
+ { CPU_LOG_RESET, "cpu_reset",
+ "show CPU state before CPU resets" },
#endif
#ifdef DEBUG_IOPORT
{ CPU_LOG_IOPORT, "ioport",
Index: b/target-i386/helper.c
===================================================================
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -352,6 +352,11 @@ void cpu_reset(CPUX86State *env)
{
int i;
+ if (loglevel & CPU_LOG_RESET) {
+ fprintf(logfile, "CPU Reset (CPU %d)\n", env->cpu_index);
+ cpu_dump_state(env, logfile, fprintf, X86_DUMP_FPU | X86_DUMP_CCOP);
+ }
+
memset(env, 0, offsetof(CPUX86State, breakpoints));
tlb_flush(env, 1);
Index: b/cpu-all.h
===================================================================
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -851,6 +851,7 @@ target_phys_addr_t cpu_get_phys_page_deb
#define CPU_LOG_PCALL (1 << 6)
#define CPU_LOG_IOPORT (1 << 7)
#define CPU_LOG_TB_CPU (1 << 8)
+#define CPU_LOG_RESET (1 << 9)
/* define log items */
typedef struct CPULogItem {
Index: b/target-arm/helper.c
===================================================================
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -153,6 +153,12 @@ static void cpu_reset_model_id(CPUARMSta
void cpu_reset(CPUARMState *env)
{
uint32_t id;
+
+ if (loglevel & CPU_LOG_RESET) {
+ fprintf(logfile, "CPU Reset (CPU %d)\n", env->cpu_index);
+ cpu_dump_state(env, logfile, fprintf, 0);
+ }
+
id = env->cp15.c0_cpuid;
memset(env, 0, offsetof(CPUARMState, breakpoints));
if (id)
Index: b/target-cris/translate.c
===================================================================
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3381,6 +3381,11 @@ CPUCRISState *cpu_cris_init (const char
void cpu_reset (CPUCRISState *env)
{
+ if (loglevel & CPU_LOG_RESET) {
+ fprintf(logfile, "CPU Reset (CPU %d)\n", env->cpu_index);
+ cpu_dump_state(env, logfile, fprintf, 0);
+ }
+
memset(env, 0, offsetof(CPUCRISState, breakpoints));
tlb_flush(env, 1);
Index: b/target-m68k/helper.c
===================================================================
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -110,6 +110,11 @@ static int cpu_m68k_set_model(CPUM68KSta
void cpu_reset(CPUM68KState *env)
{
+ if (loglevel & CPU_LOG_RESET) {
+ fprintf(logfile, "CPU Reset (CPU %d)\n", env->cpu_index);
+ cpu_dump_state(env, logfile, fprintf, 0);
+ }
+
memset(env, 0, offsetof(CPUM68KState, breakpoints));
#if !defined (CONFIG_USER_ONLY)
env->sr = 0x2700;
Index: b/target-mips/translate.c
===================================================================
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -8754,6 +8754,11 @@ CPUMIPSState *cpu_mips_init (const char
void cpu_reset (CPUMIPSState *env)
{
+ if (loglevel & CPU_LOG_RESET) {
+ fprintf(logfile, "CPU Reset (CPU %d)\n", env->cpu_index);
+ cpu_dump_state(env, logfile, fprintf, 0);
+ }
+
memset(env, 0, offsetof(CPUMIPSState, breakpoints));
tlb_flush(env, 1);
Index: b/target-ppc/helper.c
===================================================================
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2928,10 +2928,14 @@ void cpu_dump_rfi (target_ulong RA, targ
void cpu_ppc_reset (void *opaque)
{
- CPUPPCState *env;
+ CPUPPCState *env = opaque;
target_ulong msr;
- env = opaque;
+ if (loglevel & CPU_LOG_RESET) {
+ fprintf(logfile, "CPU Reset (CPU %d)\n", env->cpu_index);
+ cpu_dump_state(env, logfile, fprintf, 0);
+ }
+
msr = (target_ulong)0;
if (0) {
/* XXX: find a suitable condition to enable the hypervisor mode */
Index: b/target-sh4/translate.c
===================================================================
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -159,6 +159,11 @@ void cpu_dump_state(CPUState * env, FILE
void cpu_sh4_reset(CPUSH4State * env)
{
+ if (loglevel & CPU_LOG_RESET) {
+ fprintf(logfile, "CPU Reset (CPU %d)\n", env->cpu_index);
+ cpu_dump_state(env, logfile, fprintf, 0);
+ }
+
#if defined(CONFIG_USER_ONLY)
env->sr = SR_FD; /* FD - kernel does lazy fpu context switch */
#else
Index: b/target-sparc/helper.c
===================================================================
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -640,6 +640,11 @@ target_phys_addr_t cpu_get_phys_page_deb
void cpu_reset(CPUSPARCState *env)
{
+ if (loglevel & CPU_LOG_RESET) {
+ fprintf(logfile, "CPU Reset (CPU %d)\n", env->cpu_index);
+ cpu_dump_state(env, logfile, fprintf, 0);
+ }
+
tlb_flush(env, 1);
env->cwp = 0;
env->wim = 1;
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