Re: [Qemu-devel] [PATCH 5/x] ppc: Convert op_load_gpr_{T0, T1, T2} to TCG

[Andreas Färber]

Am 03.09.2008 um 13:28 schrieb Thiemo Seufer:

> Andreas Färber wrote:
> [snip]
> > Would there be a problem with using i64 in the 32-on-64 case? That  
> > is,
> > would it hurt to do i32 TCG operations on i64 variables on a 64-bit
> > host?
>
> I did that accidentially for the mips target and got hard to debug
> segfaults. I believe TCG requires ops and registers to have the
> same type, abart from explicit conversion functions.
>
> Another problem might be sign/zero extensions.

tcg-op.h actually uses two i32 ops (one with TCGV_HIGH) to implement  
i64 ops on 32-bit host.

Any suggestion how to get i32 var(s) into i64 without using i32 ops?  
There appears to be no special TCG function for this.

Since it was decided that for a 32-bit guest we should use tl==i32  
registers vars, I need to get two of those into an i64 temporary  
(cpu_T64).

Here's what I've pieced together:

- for ppc64 just use i64 op
- for ppc on 32-bit host use 2x i32 move, w/ TCGV_HIGH and w/o
- for ppc on 64-bit host use i32 move + i64 shift + i32 move

static always_inline void gen_op_load_gpr64(TCGv t, int reg) {
#if defined(TARGET_PPC64)
    tcg_gen_mov_i64(t, cpu_gpr[reg]);
#else
#if TCG_TARGET_REG_BITS == 32
    tcg_gen_mov_i32(TCGV_HIGH(t), cpu_gprh[reg]);
#else
    tcg_gen_mov_i32(t, cpu_gprh[reg]);
    tcg_gen_shli_i64(t, t, 32);
#endif
    tcg_gen_mov_i32(t, cpu_gpr[reg]);
#endif
}

Thoughts?

Andreas