[Qemu-devel] [PATCH 4/5] Add new cpu_names() function

[Mark McLoughlin]

Add a new function, cpu_names(), which lists the available
CPU names for the target.

Signed-off-by: Mark McLoughlin <address@hidden>
---
 target-alpha/cpu.h           |    2 ++
 target-alpha/translate.c     |    5 +++++
 target-arm/cpu.h             |    2 ++
 target-arm/helper.c          |   15 +++++++++++++++
 target-cris/cpu.h            |    2 ++
 target-cris/translate.c      |    6 ++++++
 target-i386/cpu.h            |    2 ++
 target-i386/helper.c         |   15 +++++++++++++++
 target-m68k/cpu.h            |    2 ++
 target-m68k/helper.c         |   15 +++++++++++++++
 target-mips/cpu.h            |    2 ++
 target-mips/translate_init.c |   15 +++++++++++++++
 target-ppc/cpu.h             |    2 ++
 target-ppc/translate_init.c  |   15 +++++++++++++++
 target-sh4/cpu.h             |    2 ++
 target-sh4/translate.c       |   15 +++++++++++++++
 target-sparc/cpu.h           |    2 ++
 target-sparc/helper.c        |   15 +++++++++++++++
 18 files changed, 134 insertions(+), 0 deletions(-)

diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 73ffce7..96b2b44 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -297,6 +297,7 @@ struct CPUAlphaState {
 #define cpu_gen_code cpu_alpha_gen_code
 #define cpu_signal_handler cpu_alpha_signal_handler
 #define cpu_list cpu_alpha_list
+#define cpu_names cpu_alpha_names
 
 /* MMU modes definitions */
 #define MMU_MODE0_SUFFIX _kernel
@@ -403,6 +404,7 @@ enum {
 CPUAlphaState * cpu_alpha_init (const char *cpu_model);
 int cpu_alpha_exec(CPUAlphaState *s);
 void cpu_alpha_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, 
...));
+const char * const *cpu_alpha_names(void);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
    signal handlers to inform the virtual CPU of exceptions. non zero
    is returned if the signal was handled by the virtual CPU.  */
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 0987a8d..c28ba38 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2370,6 +2370,11 @@ void cpu_alpha_list (FILE *f, int (*cpu_fprintf)(FILE 
*f, const char *fmt, ...))
     /* no cpu model variants */
 }
 
+const char * const *cpu_alpha_names (void)
+{
+    /* no cpu model variants */
+}
+
 CPUAlphaState * cpu_alpha_init (const char *cpu_model)
 {
     CPUAlphaState *env;
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index e40eb72..8ebee55 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -202,6 +202,7 @@ void arm_translate_init(void);
 int cpu_arm_exec(CPUARMState *s);
 void cpu_arm_close(CPUARMState *s);
 void cpu_arm_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+const char * const *cpu_arm_names(void);
 void do_interrupt(CPUARMState *);
 void switch_mode(CPUARMState *, int);
 uint32_t do_arm_semihosting(CPUARMState *env);
@@ -393,6 +394,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
 #define cpu_gen_code cpu_arm_gen_code
 #define cpu_signal_handler cpu_arm_signal_handler
 #define cpu_list cpu_arm_list
+#define cpu_names cpu_arm_names
 
 #define CPU_SAVE_VERSION 1
 
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 8b2b12d..0d86c81 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -301,6 +301,21 @@ void cpu_arm_list(FILE *f, int (*cpu_fprintf)(FILE *f, 
const char *fmt, ...))
     }
 }
 
+const char * const *cpu_arm_names(void)
+{
+    static const char *names[sizeof(arm_cpu_names)/sizeof(struct arm_cpu_t)];
+
+    if (!names[0]) {
+       int i;
+
+       for (i = 0; arm_cpu_names[i].name; i++)
+           names[i] = arm_cpu_names[i].name;
+       names[i] = NULL;
+    }
+
+    return names;
+}
+
 /* return 0 if not found */
 static uint32_t cpu_arm_find_by_name(const char *name)
 {
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 8f3eeb6..d2d5e34 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -162,6 +162,7 @@ CPUCRISState *cpu_cris_init(const char *cpu_model);
 int cpu_cris_exec(CPUCRISState *s);
 void cpu_cris_close(CPUCRISState *s);
 void cpu_cris_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+const char * const *cpu_cris_names(void);
 void do_interrupt(CPUCRISState *env);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
    signal handlers to inform the virtual CPU of exceptions. non zero
@@ -208,6 +209,7 @@ enum {
 #define cpu_gen_code cpu_cris_gen_code
 #define cpu_signal_handler cpu_cris_signal_handler
 #define cpu_list cpu_cris_list
+#define cpu_names cpu_cris_names
 
 #define CPU_SAVE_VERSION 1
 
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 19bf2f3..d651cf4 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3489,6 +3489,12 @@ void cpu_cris_list (FILE *f, int (*cpu_fprintf)(FILE *f, 
const char *fmt, ...))
        /* no cpu model variants */
 }
 
+const char * const *cpu_cris_names (void)
+{
+       /* no cpu model variants */
+       return NULL;
+}
+
 CPUCRISState *cpu_cris_init (const char *cpu_model)
 {
        CPUCRISState *env;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 601f4ee..5b8c6a0 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -632,6 +632,7 @@ CPUX86State *cpu_x86_init(const char *cpu_model);
 int cpu_x86_exec(CPUX86State *s);
 void cpu_x86_close(CPUX86State *s);
 void cpu_x86_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+const char * const *cpu_x86_names(void);
 int cpu_get_pic_interrupt(CPUX86State *s);
 /* MSDOS compatibility mode FPU exception support */
 void cpu_set_ferr(CPUX86State *s);
@@ -760,6 +761,7 @@ static inline int cpu_get_time_fast(void)
 #define cpu_gen_code cpu_x86_gen_code
 #define cpu_signal_handler cpu_x86_signal_handler
 #define cpu_list cpu_x86_list
+#define cpu_names cpu_x86_names
 
 #define CPU_SAVE_VERSION 7
 
diff --git a/target-i386/helper.c b/target-i386/helper.c
index bed01d5..de5e4b8 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -400,6 +400,21 @@ void cpu_x86_list(FILE *f, int (*cpu_fprintf)(FILE *f, 
const char *fmt, ...))
         (*cpu_fprintf)(f, "x86 %16s\n", x86_defs[i].name);
 }
 
+const char * const *cpu_x86_names(void)
+{
+    static const char *names[sizeof(x86_defs)/sizeof(x86_def_t) + 1];
+
+    if (!names[0]) {
+       int i;
+
+       for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++)
+           names[i] = x86_defs[i].name;
+       names[i] = NULL;
+    }
+
+    return names;
+}
+
 static int cpu_x86_register (CPUX86State *env, const char *cpu_model)
 {
     x86_def_t def1, *def = &def1;
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 477b46f..dfb7603 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -118,6 +118,7 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model);
 int cpu_m68k_exec(CPUM68KState *s);
 void cpu_m68k_close(CPUM68KState *s);
 void cpu_m68k_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+const char * const *cpu_m68k_names(void);
 void do_interrupt(int is_hw);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
    signal handlers to inform the virtual CPU of exceptions. non zero
@@ -214,6 +215,7 @@ void register_m68k_insns (CPUM68KState *env);
 #define cpu_gen_code cpu_m68k_gen_code
 #define cpu_signal_handler cpu_m68k_signal_handler
 #define cpu_list cpu_m68k_list
+#define cpu_names cpu_m68k_names
 
 /* MMU modes definitions */
 #define MMU_MODE0_SUFFIX _kernel
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 9e13ace..368bb9a 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -63,6 +63,21 @@ void cpu_m68k_list(FILE *f, int (*cpu_fprintf)(FILE *f, 
const char *fmt, ...))
        (*cpu_fprintf)(f, "  %s\n", m68k_cpu_defs[i].name);
 }
 
+const char * const *cpu_m68k_names(void)
+{
+    static const char *names[sizeof(m68k_cpu_defs)/sizeof(m68k_def_t)];
+
+    if (!names[0]) {
+       int i;
+
+       for (i = 0; m68k_cpu_defs[i].name; i++)
+           names[i] = m68k_cpu_defs[i].name;
+       names[i] = NULL;
+    }
+
+    return names;
+}
+
 static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
 {
     if (n < 8) {
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index d32393c..5032143 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -478,6 +478,7 @@ void do_unassigned_access(target_phys_addr_t addr, int 
is_write, int is_exec,
 #define cpu_gen_code cpu_mips_gen_code
 #define cpu_signal_handler cpu_mips_signal_handler
 #define cpu_list cpu_mips_list
+#define cpu_names cpu_mips_names
 
 #define CPU_SAVE_VERSION 3
 
@@ -560,6 +561,7 @@ enum {
 int cpu_mips_exec(CPUMIPSState *s);
 CPUMIPSState *cpu_mips_init(const char *cpu_model);
 void cpu_mips_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+const char * const *cpu_mips_names(void);
 uint32_t cpu_mips_get_clock (void);
 int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
 
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index def0a04..1733c5d 100644
--- a/target-mips/translate_init.c
+++ b/target-mips/translate_init.c
@@ -439,6 +439,21 @@ void cpu_mips_list(FILE *f, int (*cpu_fprintf)(FILE *f, 
const char *fmt, ...))
     }
 }
 
+const char * const *cpu_mips_names(void)
+{
+    static const char *names[sizeof(mips_defs)/sizeof(mips_defs[0]) + 1];
+
+    if (!names[0]) {
+       int i;
+
+       for (i = 0; i < sizeof(mips_defs) / sizeof(mips_defs[0]); i++)
+           names[i] = mips_defs[i].name;
+       names[i] = NULL;
+    }
+
+    return names;
+}
+
 #ifndef CONFIG_USER_ONLY
 static void no_mmu_init (CPUMIPSState *env, const mips_def_t *def)
 {
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 7b466a5..ea9189d 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -693,6 +693,7 @@ void ppc_translate_init(void);
 int cpu_ppc_exec (CPUPPCState *s);
 void cpu_ppc_close (CPUPPCState *s);
 void cpu_ppc_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+const char * const *cpu_ppc_names(void);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
    signal handlers to inform the virtual CPU of exceptions. non zero
    is returned if the signal was handled by the virtual CPU.  */
@@ -801,6 +802,7 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, 
target_ulong val);
 #define cpu_gen_code cpu_ppc_gen_code
 #define cpu_signal_handler cpu_ppc_signal_handler
 #define cpu_list cpu_ppc_list
+#define cpu_names cpu_ppc_names
 
 #define CPU_SAVE_VERSION 3
 
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 5702a67..b57627b 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -9486,3 +9486,18 @@ void cpu_ppc_list(FILE *f, int (*cpu_fprintf)(FILE *f, 
const char *fmt, ...))
                        ppc_defs[i].name, ppc_defs[i].pvr);
     }
 }
+
+const char * const *cpu_ppc_names (void)
+{
+    static const char *names[sizeof(ppc_defs) / sizeof(ppc_def_t) + 1];
+
+    if (!names[0]) {
+       int i;
+
+       for (i = 0; i < sizeof(ppc_defs) / sizeof(ppc_def_t); i++)
+           names[i] = ppc_defs[i].name;
+       names[i] = NULL;
+    }
+
+    return names;
+}
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 4bf30cc..6823694 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -138,6 +138,7 @@ int cpu_sh4_exec(CPUSH4State * s);
 int cpu_sh4_signal_handler(int host_signum, void *pinfo,
                            void *puc);
 void cpu_sh4_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+const char * const *cpu_sh4_names(void);
 void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr,
                                    uint32_t mem_value);
 
@@ -154,6 +155,7 @@ static inline void cpu_set_tls(CPUSH4State *env, 
target_ulong newtls)
 #define cpu_gen_code cpu_sh4_gen_code
 #define cpu_signal_handler cpu_sh4_signal_handler
 #define cpu_list cpu_sh4_list
+#define cpu_names cpu_sh4_names
 
 /* MMU modes definitions */
 #define MMU_MODE0_SUFFIX _kernel
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 43aef0c..4ee80a9 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -228,6 +228,21 @@ void cpu_sh4_list(FILE *f, int (*cpu_fprintf)(FILE *f, 
const char *fmt, ...))
        (*cpu_fprintf)(f, "%s\n", sh4_defs[i].name);
 }
 
+const char * const *cpu_sh4_names(void)
+{
+    static const char *names[sizeof(sh4_defs) / sizeof(*sh4_defs) + 1];
+
+    if (!names[0]) {
+       int i;
+
+       for (i = 0; i < sizeof(sh4_defs) / sizeof(*sh4_defs); i++)
+           names[i] = sh4_defs[i].name;
+       names[i] = NULL;
+    }
+
+    return names;
+}
+
 static void cpu_sh4_register(CPUSH4State *env, const sh4_def_t *def)
 {
     env->pvr = def->pvr;
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 81896ee..98fb067 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -339,6 +339,7 @@ typedef struct CPUSPARCState {
 CPUSPARCState *cpu_sparc_init(const char *cpu_model);
 void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu);
 void cpu_sparc_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, 
...));
+const char * const *cpu_sparc_names(void);
 void cpu_lock(void);
 void cpu_unlock(void);
 int cpu_sparc_handle_mmu_fault(CPUSPARCState *env1, target_ulong address, int 
rw,
@@ -438,6 +439,7 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, 
void *puc);
 #define cpu_gen_code cpu_sparc_gen_code
 #define cpu_signal_handler cpu_sparc_signal_handler
 #define cpu_list cpu_sparc_list
+#define cpu_names cpu_sparc_names
 
 #define CPU_SAVE_VERSION 5
 
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 10e47db..6205de1 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -1359,6 +1359,21 @@ void cpu_sparc_list(FILE *f, int (*cpu_fprintf)(FILE *f, 
const char *fmt, ...))
                    "fpu_version mmu_version nwindows\n");
 }
 
+const char * const *cpu_sparc_names(void)
+{
+    static const char *names[sizeof(sparc_defs) / sizeof(sparc_def_t) + 1];
+
+    if (!names[0]) {
+       int i;
+
+       for (i = 0; i < sizeof(sparc_defs) / sizeof(sparc_def_t); i++)
+           names[i] = sparc_defs[i].name;
+       names[i] = NULL;
+    }
+
+    return names;
+}
+
 #define GET_FLAG(a,b) ((env->psr & a)?b:'-')
 
 void cpu_dump_state(CPUState *env, FILE *f,
-- 
1.5.4.3